{"title":"用于集成电容传感器接口的13.5位1.6 mW三阶CT ΣΔ ADC","authors":"Javed S. Gaggatur, Gaurab Banerjee","doi":"10.1109/SOCC.2017.8226003","DOIUrl":null,"url":null,"abstract":"An integrated capacitance sensor interface is proposed with three programmable gain stages to measure femto-farad capacitance. The capacitance sensor interface is a differential measurement set-up to measure the change in capacitance over a fixed nominal capacitance. The programmable gain stages are used to change the gain settings to operate for a wide-range capacitance measurement. The implemented continuous time ΣΔ ADC is a third-order cascade of integrators feedforward topology with a signal bandwidth of 10 kHz. The ADC has a measured peak dynamic range of 84.5 dB while consuming 1.6 mW. The measured figure of merit (FoM) is 3.107 pJ-mm2/conversion at a clock frequency of 6.4 MHz having an active area of 0.45 mm2. The ADC was applied in the femto-farad capacitance measurement using a 0.3 pF–1.2 pF variable capacitor typically encountered in MEMS-based sensor applications like pressure/humidity/flow sensing in System-in-Package (SiP) or Systems-on-Chip (SoC).","PeriodicalId":366264,"journal":{"name":"2017 30th IEEE International System-on-Chip Conference (SOCC)","volume":"66 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2017-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"A 13.5 bit 1.6 mW 3rd order CT ΣΔ ADC for integrated capacitance sensor interface\",\"authors\":\"Javed S. Gaggatur, Gaurab Banerjee\",\"doi\":\"10.1109/SOCC.2017.8226003\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"An integrated capacitance sensor interface is proposed with three programmable gain stages to measure femto-farad capacitance. The capacitance sensor interface is a differential measurement set-up to measure the change in capacitance over a fixed nominal capacitance. The programmable gain stages are used to change the gain settings to operate for a wide-range capacitance measurement. The implemented continuous time ΣΔ ADC is a third-order cascade of integrators feedforward topology with a signal bandwidth of 10 kHz. The ADC has a measured peak dynamic range of 84.5 dB while consuming 1.6 mW. The measured figure of merit (FoM) is 3.107 pJ-mm2/conversion at a clock frequency of 6.4 MHz having an active area of 0.45 mm2. The ADC was applied in the femto-farad capacitance measurement using a 0.3 pF–1.2 pF variable capacitor typically encountered in MEMS-based sensor applications like pressure/humidity/flow sensing in System-in-Package (SiP) or Systems-on-Chip (SoC).\",\"PeriodicalId\":366264,\"journal\":{\"name\":\"2017 30th IEEE International System-on-Chip Conference (SOCC)\",\"volume\":\"66 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2017-09-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2017 30th IEEE International System-on-Chip Conference (SOCC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/SOCC.2017.8226003\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2017 30th IEEE International System-on-Chip Conference (SOCC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SOCC.2017.8226003","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A 13.5 bit 1.6 mW 3rd order CT ΣΔ ADC for integrated capacitance sensor interface
An integrated capacitance sensor interface is proposed with three programmable gain stages to measure femto-farad capacitance. The capacitance sensor interface is a differential measurement set-up to measure the change in capacitance over a fixed nominal capacitance. The programmable gain stages are used to change the gain settings to operate for a wide-range capacitance measurement. The implemented continuous time ΣΔ ADC is a third-order cascade of integrators feedforward topology with a signal bandwidth of 10 kHz. The ADC has a measured peak dynamic range of 84.5 dB while consuming 1.6 mW. The measured figure of merit (FoM) is 3.107 pJ-mm2/conversion at a clock frequency of 6.4 MHz having an active area of 0.45 mm2. The ADC was applied in the femto-farad capacitance measurement using a 0.3 pF–1.2 pF variable capacitor typically encountered in MEMS-based sensor applications like pressure/humidity/flow sensing in System-in-Package (SiP) or Systems-on-Chip (SoC).