{"title":"用于超阈值和近/亚阈值应用的单片三维MoS2-n/WSe2-p SRAM单元的稳定性优化","authors":"Chang-Hung Yu, P. Su, C. Chuang","doi":"10.1109/S3S.2016.7804396","DOIUrl":null,"url":null,"abstract":"2-D transition metal dichalcogenides (TMDs) such as MoS2 and WSe2 (Fig. 1(a)) are very attractive for future ultimately scaled low-power CMOS devices owing to their atomic-scale thickness, adequate band-gap, and pristine surface (without dangling bonds) [1-3]. Our previous study [4] has evaluated the stability of MoS2-n/WSe2-p SRAMs with planar technology. However, the process complexity of heterogeneous integration of distinct materials for n/p-FETs can become a concern. Monolithic 3-D integration [5] offers the possibility to independently optimize the n-FETs and p-FETs at distinct tiers. It has also been envisioned [6] that monolithic 3-D integration combined with the extremely scaled TMD devices may offer the ultimate solution for future ultra-high density ICs and SRAMs (Fig. 1(c)).","PeriodicalId":145660,"journal":{"name":"2016 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S)","volume":"48 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2016-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Stability optimization of monolithic 3-D MoS2-n/WSe2-p SRAM cells for superthreshold and near-/sub-threshold applications\",\"authors\":\"Chang-Hung Yu, P. Su, C. Chuang\",\"doi\":\"10.1109/S3S.2016.7804396\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"2-D transition metal dichalcogenides (TMDs) such as MoS2 and WSe2 (Fig. 1(a)) are very attractive for future ultimately scaled low-power CMOS devices owing to their atomic-scale thickness, adequate band-gap, and pristine surface (without dangling bonds) [1-3]. Our previous study [4] has evaluated the stability of MoS2-n/WSe2-p SRAMs with planar technology. However, the process complexity of heterogeneous integration of distinct materials for n/p-FETs can become a concern. Monolithic 3-D integration [5] offers the possibility to independently optimize the n-FETs and p-FETs at distinct tiers. It has also been envisioned [6] that monolithic 3-D integration combined with the extremely scaled TMD devices may offer the ultimate solution for future ultra-high density ICs and SRAMs (Fig. 1(c)).\",\"PeriodicalId\":145660,\"journal\":{\"name\":\"2016 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S)\",\"volume\":\"48 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2016-10-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2016 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/S3S.2016.7804396\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/S3S.2016.7804396","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Stability optimization of monolithic 3-D MoS2-n/WSe2-p SRAM cells for superthreshold and near-/sub-threshold applications
2-D transition metal dichalcogenides (TMDs) such as MoS2 and WSe2 (Fig. 1(a)) are very attractive for future ultimately scaled low-power CMOS devices owing to their atomic-scale thickness, adequate band-gap, and pristine surface (without dangling bonds) [1-3]. Our previous study [4] has evaluated the stability of MoS2-n/WSe2-p SRAMs with planar technology. However, the process complexity of heterogeneous integration of distinct materials for n/p-FETs can become a concern. Monolithic 3-D integration [5] offers the possibility to independently optimize the n-FETs and p-FETs at distinct tiers. It has also been envisioned [6] that monolithic 3-D integration combined with the extremely scaled TMD devices may offer the ultimate solution for future ultra-high density ICs and SRAMs (Fig. 1(c)).