2.5 mW/ch, 50 Mcps, 10个模拟通道,具有9.71 ps-RMS时序分辨率的自适应偏置读出前端IC,用于90 nm CMOS中的单光子飞行时间PET应用

H. Cruz, Hong-Yi Huang, Shueen-Yu Lee, C. Luo
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引用次数: 2

摘要

采用90纳米CMOS工艺实现了一种10通道飞行时间(TOF)正电子发射断层扫描(PET) IC,该IC采用基于数模转换(DAC)的架构。DAC用于补偿由放大器增益波动引起的时间分辨率变化。混合信号复位信号提高光子计数速度,达到5M计数/s/ch。该集成电路使用自适应偏置来稳定前置放大器和比较器的增益。多级前置放大器和比较器架构选择低功耗。测量结果表明,这些技术使集成电路在0.5V和1.2V电源下功耗为2.5mW时,在使用雪崩光电二极管和激光器的情况下,实现了9.71ps-RMS的固有抖动和181.5ps-FWHM(半最大全宽)时序分辨率。该集成电路采用90nm CMOS工艺,面积为3.3 × 2.7mm2。
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A 2.5 mW/ch, 50 Mcps, 10-analog channel, adaptively biased read-out front-end IC with 9.71 ps-RMS timing resolution for single-photon time-of-flight PET applications in 90 nm CMOS
A 10-channel time-of-flight (TOF) positron emission tomography (PET) IC that uses a digital-to-analog (DAC) - based architecture is implemented in 90nm CMOS process. The DAC is used to compensate for timing resolution variation attributed to amplifier gain fluctuation. Mixed-signal reset signals enhance photon counting speed achieving 5M counts/s/ch. The IC uses adaptive biases to stabilize the gain of preamplifiers and comparators. Multi-stage preamplifiers and comparator architectures were selected for low power. Measurement results show that these techniques enable the IC to achieve 9.71ps-RMS of intrinsic jitter and 181.5ps-FWHM (Full-width-at-half-maximum) timing resolution using an avalanche photo-diode and laser setup while consuming 2.5mW at 0.5V and 1.2V power supplies. The IC was fabricated in a 90nm CMOS process with area of 3.3 × 2.7mm2.
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