{"title":"顺序电路空间压缩的一种结构方法","authors":"M. Seuring, M. Gössel","doi":"10.1109/DFTVS.1999.802889","DOIUrl":null,"url":null,"abstract":"In this paper a new structural method for linear output space compaction for synchronous sequential circuits is presented. Based on simple estimates for the probabilities of the existence of sensitized paths from the signal lines to the circuit outputs, optimal output partitions are determined without fault simulation. The method is developed for concurrent checking, but as the experimental results show, it is also effectively applicable in pseudo-random test mode.","PeriodicalId":448322,"journal":{"name":"Proceedings 1999 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (EFT'99)","volume":"123 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1999-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"A structural approach for space compaction for sequential circuits\",\"authors\":\"M. Seuring, M. Gössel\",\"doi\":\"10.1109/DFTVS.1999.802889\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this paper a new structural method for linear output space compaction for synchronous sequential circuits is presented. Based on simple estimates for the probabilities of the existence of sensitized paths from the signal lines to the circuit outputs, optimal output partitions are determined without fault simulation. The method is developed for concurrent checking, but as the experimental results show, it is also effectively applicable in pseudo-random test mode.\",\"PeriodicalId\":448322,\"journal\":{\"name\":\"Proceedings 1999 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (EFT'99)\",\"volume\":\"123 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1999-11-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings 1999 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (EFT'99)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/DFTVS.1999.802889\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings 1999 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (EFT'99)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/DFTVS.1999.802889","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A structural approach for space compaction for sequential circuits
In this paper a new structural method for linear output space compaction for synchronous sequential circuits is presented. Based on simple estimates for the probabilities of the existence of sensitized paths from the signal lines to the circuit outputs, optimal output partitions are determined without fault simulation. The method is developed for concurrent checking, but as the experimental results show, it is also effectively applicable in pseudo-random test mode.
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