{"title":"基于能量曲线重构技术的12位200kS/s次相位差SAR ADC","authors":"Yao-Sheng Hu, Kai-Yue Lin, Hsin-Shu Chen","doi":"10.1109/ASSCC.2016.7844157","DOIUrl":null,"url":null,"abstract":"This paper presents an energy-efficient 12-bit 200kS/s subranging SAR ADC for multi-touch sensing applications. In order to reduce DAC power consumption, an energy-curve reshape technique is proposed to fit the switching energy curve to the characteristics of Rx signals. An auxiliary polarity quantizer joined with the well-known bottom-plate sampling not only can eliminate the gain mismatch of the subranging architecture but also can be as effective as the top-plate sampling. The ADC low-voltage operation could support the smart wake-up mode in the touch sensing system without using dual reference voltages. A pulse-type self-trigger latch technique is utilized to decrease digital loop power dissipation in the low-voltage environment. This ADC consumes 0.95 μW at 200kS/s under a 0.7V supply in 40nm CMOS technology. It achieves an SNDR of 69.24dB at Nyquist rate and results in an FoM of 2fJ/c.-s.","PeriodicalId":278002,"journal":{"name":"2016 IEEE Asian Solid-State Circuits Conference (A-SSCC)","volume":"35 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2016-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":"{\"title\":\"A 12-bit 200kS/s subranging SAR ADC with an energy-curve reshape technique\",\"authors\":\"Yao-Sheng Hu, Kai-Yue Lin, Hsin-Shu Chen\",\"doi\":\"10.1109/ASSCC.2016.7844157\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents an energy-efficient 12-bit 200kS/s subranging SAR ADC for multi-touch sensing applications. In order to reduce DAC power consumption, an energy-curve reshape technique is proposed to fit the switching energy curve to the characteristics of Rx signals. An auxiliary polarity quantizer joined with the well-known bottom-plate sampling not only can eliminate the gain mismatch of the subranging architecture but also can be as effective as the top-plate sampling. The ADC low-voltage operation could support the smart wake-up mode in the touch sensing system without using dual reference voltages. A pulse-type self-trigger latch technique is utilized to decrease digital loop power dissipation in the low-voltage environment. This ADC consumes 0.95 μW at 200kS/s under a 0.7V supply in 40nm CMOS technology. It achieves an SNDR of 69.24dB at Nyquist rate and results in an FoM of 2fJ/c.-s.\",\"PeriodicalId\":278002,\"journal\":{\"name\":\"2016 IEEE Asian Solid-State Circuits Conference (A-SSCC)\",\"volume\":\"35 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2016-11-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"3\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2016 IEEE Asian Solid-State Circuits Conference (A-SSCC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ASSCC.2016.7844157\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 IEEE Asian Solid-State Circuits Conference (A-SSCC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ASSCC.2016.7844157","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A 12-bit 200kS/s subranging SAR ADC with an energy-curve reshape technique
This paper presents an energy-efficient 12-bit 200kS/s subranging SAR ADC for multi-touch sensing applications. In order to reduce DAC power consumption, an energy-curve reshape technique is proposed to fit the switching energy curve to the characteristics of Rx signals. An auxiliary polarity quantizer joined with the well-known bottom-plate sampling not only can eliminate the gain mismatch of the subranging architecture but also can be as effective as the top-plate sampling. The ADC low-voltage operation could support the smart wake-up mode in the touch sensing system without using dual reference voltages. A pulse-type self-trigger latch technique is utilized to decrease digital loop power dissipation in the low-voltage environment. This ADC consumes 0.95 μW at 200kS/s under a 0.7V supply in 40nm CMOS technology. It achieves an SNDR of 69.24dB at Nyquist rate and results in an FoM of 2fJ/c.-s.