K. Matsui, I. Yamamoto, K. Tsuboi, K. Iwata, S. Muto, M. Watanabe, F. Ueda
{"title":"电力系统中由开关调节器产生的谐波电流的减小方法","authors":"K. Matsui, I. Yamamoto, K. Tsuboi, K. Iwata, S. Muto, M. Watanabe, F. Ueda","doi":"10.1109/IAS.1993.299238","DOIUrl":null,"url":null,"abstract":"A forward power converter with reduced harmonics for the input supply current is proposed. In this converter, the input capacitance is reduced, so that lower-order harmonics such as the fifth and the seventh can be largely reduced by about 20% to 40%. However, the DC link voltage ripple is increased in the proposed circuit. Such characteristics have been improved by a ripple compensation circuit consisting of the feedforward circuit. One can also obtain a noticeable harmonic elimination effect for the use of parallel connection between the proposed circuits and the conventional ones.<<ETX>>","PeriodicalId":345027,"journal":{"name":"Conference Record of the 1993 IEEE Industry Applications Conference Twenty-Eighth IAS Annual Meeting","volume":"85 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1993-10-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":"{\"title\":\"A reduction method of harmonic currents in power systems generated by switching regulators\",\"authors\":\"K. Matsui, I. Yamamoto, K. Tsuboi, K. Iwata, S. Muto, M. Watanabe, F. Ueda\",\"doi\":\"10.1109/IAS.1993.299238\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A forward power converter with reduced harmonics for the input supply current is proposed. In this converter, the input capacitance is reduced, so that lower-order harmonics such as the fifth and the seventh can be largely reduced by about 20% to 40%. However, the DC link voltage ripple is increased in the proposed circuit. Such characteristics have been improved by a ripple compensation circuit consisting of the feedforward circuit. One can also obtain a noticeable harmonic elimination effect for the use of parallel connection between the proposed circuits and the conventional ones.<<ETX>>\",\"PeriodicalId\":345027,\"journal\":{\"name\":\"Conference Record of the 1993 IEEE Industry Applications Conference Twenty-Eighth IAS Annual Meeting\",\"volume\":\"85 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1993-10-02\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"4\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Conference Record of the 1993 IEEE Industry Applications Conference Twenty-Eighth IAS Annual Meeting\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IAS.1993.299238\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Conference Record of the 1993 IEEE Industry Applications Conference Twenty-Eighth IAS Annual Meeting","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IAS.1993.299238","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A reduction method of harmonic currents in power systems generated by switching regulators
A forward power converter with reduced harmonics for the input supply current is proposed. In this converter, the input capacitance is reduced, so that lower-order harmonics such as the fifth and the seventh can be largely reduced by about 20% to 40%. However, the DC link voltage ripple is increased in the proposed circuit. Such characteristics have been improved by a ripple compensation circuit consisting of the feedforward circuit. One can also obtain a noticeable harmonic elimination effect for the use of parallel connection between the proposed circuits and the conventional ones.<>