40nm CMOS中具有22.7 db增益和4.4 db NF的紧凑型60ghz LNA

Jiacong Ke, Guangyin Feng, Yanjie Wang
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引用次数: 0

摘要

本文提出了一种适用于60 GHz相控阵应用的紧凑型低噪声放大器(LNA)设计。利用基于单变压器的四阶谐振器进行输入和级间匹配,实现了仅0.08mm2的紧凑核心面积。采用毫米波(mm-Wave)电路设计的单元晶体管-单元布局设计技术,减少了不确定的高频耦合效应,使峰值增益达到22.7dB。基于后置布局仿真结果,实现了4.4 db噪声系数(NF)和3db带宽(54 ~ 63 GHz),总功耗为29.9 mW。
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A Compact 60 GHz LNA with 22.7-dB Gain and 4.4-dB NF in 40nm CMOS
This paper presents a compact low-noise amplifier (LNA) design for 60 GHz phased-array applications. Utilizing single transformer-based 4th-order resonators for input and inter-stage matching, a compact core area of only 0.08mm2 is achieved. A unit transistor-cell layout design technique for millimeter-wave (mm-Wave) circuit design is adopted to reduce the uncertain high-frequency coupling effects, leading a peak gain of 22.7dB. A 4.4-dB noise figure (NF) and a 3-dB bandwidth from 54 to 63 GHz are achieved based on the post layout simulation results, with a total power consumption of 29.9 mW.
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