60 nm gate length Al2O3 / In0.53Ga0.47As gate-first MOSFETs using InAs raised source-drain regrowth

Given adequately low source/drain (S/D) access resistivity and dielectric interface trap density (Raccess < 50 Ω-µ,¹ and Dit < 2 · 10¹² cm⁻² eV^−1,2 respectively), InGaAs MOSFETs will provide greater on-state current than silicon MOSFETs at the same effective oxide thickness (EOT). The access resistance must be obtained in a self-aligned structure with a contacted gate pitch ∼4 times the physical gate length (Lg), e.g. 116 nm at 32 nm Lg,³ while control of short channel effects demands that the S/D region depth be only a fraction of gate length; low-resistance, ultra-shallow fully self-aligned III-V MOS processes must therefore be developed. Here we report a 60 nm Lg In0.53Ga0.47As MOSFET fabricated in a gate-first process with self-aligned raised InAs S/D access regions formed by MBE regrowth. The devices have a peak drive current of 1.36 mA/µm at Vds = 1.25 V and Vgs = 3 V and an Ron = 341 ohm-µm. To our knowledge this is the lowest Ron and smallest Lg reported to date for In0.53Ga0.47As surface channel MOSFETs.⁴