集成内存自检和EDA解决方案

Records of the 2004 International Workshop on Memory Technology, Design and Testing, 2004. Pub Date : 2004-08-09 DOI:10.1109/MTDT.2004.5

R. Adams, R. Abbott, Xiaoliang Bai, D. Burek, E. MacDonald

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引用次数: 8

摘要

内存内置自检(BIST)是芯片设计和电子设计自动化(EDA)流程的关键部分。为了测试正确的故障模型，BIST工具需要在拓扑和布局级别上理解内存。BIST还需要完全集成到整个EDA流程中，以便对芯片面积的影响最小，并对芯片设计人员具有最大的易用性。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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An integrated memory self test and EDA solution

Memory built-in self-test (BIST) is a critical portion of the chip design and electronic design automation (EDA) flow. A BIST tool needs to understand the memory at the topological and layout levels in order to test for the correct fault models. The BIST also needs to be fully integrated into the overall EDA flow in order to have the least impact on chip area and have the greatest ease of use to the chip designer.

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Records of the 2004 International Workshop on Memory Technology, Design and Testing, 2004.

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