采用低温射频溅射法,采用高介电常数薄膜电容器的先进GaAs-MMIC工艺技术

M. Nishitsuji, A. Tamura, T. Kunihisa, K. Yaharta, M. Shibuya, M. Kitagawa, T. Hirao
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引用次数: 19

摘要

作者利用低温射频溅射SrTiO/ sub3 /薄膜电容器与wsi栅极自对准场效应管(safet)相结合,开发了一种新的GaAs-MMIC工艺技术。采用射频溅射法,在200/spl sim/300/spl度/C的温度范围内,获得了介电常数(/spl epsi// subr /)大于100、漏电流密度小于10/sup -6/A/cm/sup 2/的高介电常数(/spl epsi// subr /)大于100的SrTiO/ sub3 /薄膜。该SrTiO/sub - 3/电容在3.0 GHz频率下无/spl epsi///sub - r/变化,在0.2 GHz和1.0 GHz频率下,32 pf电容(S=10,000 /spl mu/m/sup 2/)的插入损耗分别为0.29 dB和0.05 dB。通过将这些片上SrTiO/sub /旁路电容器集成到gaas集成电路中,成功地降低了源地互连的寄生电感,并获得了增强的自偏置放大电路增益特性
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Advanced GaAs-MMIC process technology using high-dielectric constant thin film capacitors by low-temperature RF sputtering method
The authors have developed a new GaAs-MMIC process technology using the low-temperature RF sputtered SrTiO/sub 3/ thin film capacitors which were combined with WSi-gate self-aligned FETs (SAFETs). The SrTiO/sub 3/ film with high dielectric constant (/spl epsi//sub r/) over 100 and low leakage current density under 10/sup -6/A/cm/sup 2/ at 1 MV/cm was obtained by RF sputtering method with the temperature range of 200/spl sim/300/spl deg/C. This SrTiO/sub 3/ capacitor exhibited no /spl epsi///sub r/ change up to 3.0 GHz, and low insertion losses of 0.29 dB and 0.05 dB were obtained for 32 pF-capacitor (S=10,000 /spl mu/m/sup 2/) at 0.2 GHz and 1.0 GHz, respectively. By integrating these on-chip SrTiO/sub 3/ bypass-capacitors into GaAs-IC, the parasitic inductance of the source-to-ground interconnection is successfully reduced, and the enhanced gain characteristic was obtained for self-biased amplifier circuit.<>
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