大功率VDMOSFET的可靠性评估

Yun-Xia Bai, Chun-sheng Guo, S. Feng, Kaikai Ding, Si-Xiang Zhuang, Rong Su
{"title":"大功率VDMOSFET的可靠性评估","authors":"Yun-Xia Bai, Chun-sheng Guo, S. Feng, Kaikai Ding, Si-Xiang Zhuang, Rong Su","doi":"10.1109/IPFA.2009.5232635","DOIUrl":null,"url":null,"abstract":"The specific application of power devices has imposed the requirement for intensive investigation of their reliability. In this paper we have investigated the reliability and failure mechanism of power VDMOS. In constant-stress accelerated life test, the three different temperatures (150°C, 165°C and 180°C) are imposed on the devices. Under the bias VDS=7.5V, IDS=0.8A, and the channel temperature T=117°C, the average lifetime is 3.67×106 h , the activation energy E is 0.54eV, and the main failure mechanism is gate damage.","PeriodicalId":210619,"journal":{"name":"2009 16th IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits","volume":"84 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2009-07-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Reliability evaluation of power VDMOSFET\",\"authors\":\"Yun-Xia Bai, Chun-sheng Guo, S. Feng, Kaikai Ding, Si-Xiang Zhuang, Rong Su\",\"doi\":\"10.1109/IPFA.2009.5232635\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The specific application of power devices has imposed the requirement for intensive investigation of their reliability. In this paper we have investigated the reliability and failure mechanism of power VDMOS. In constant-stress accelerated life test, the three different temperatures (150°C, 165°C and 180°C) are imposed on the devices. Under the bias VDS=7.5V, IDS=0.8A, and the channel temperature T=117°C, the average lifetime is 3.67×106 h , the activation energy E is 0.54eV, and the main failure mechanism is gate damage.\",\"PeriodicalId\":210619,\"journal\":{\"name\":\"2009 16th IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits\",\"volume\":\"84 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2009-07-06\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2009 16th IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IPFA.2009.5232635\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2009 16th IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IPFA.2009.5232635","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1

摘要

动力器件的特殊应用要求对其可靠性进行深入的研究。本文对大功率VDMOS的可靠性和失效机理进行了研究。在恒应力加速寿命试验中,对器件施加150℃、165℃和180℃三种不同的温度。在偏置VDS=7.5V, IDS=0.8A,通道温度T=117℃下,平均寿命为3.67×106 h,活化能E为0.54eV,主要失效机制为栅极损伤。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
查看原文
分享 分享
微信好友 朋友圈 QQ好友 复制链接
本刊更多论文
Reliability evaluation of power VDMOSFET
The specific application of power devices has imposed the requirement for intensive investigation of their reliability. In this paper we have investigated the reliability and failure mechanism of power VDMOS. In constant-stress accelerated life test, the three different temperatures (150°C, 165°C and 180°C) are imposed on the devices. Under the bias VDS=7.5V, IDS=0.8A, and the channel temperature T=117°C, the average lifetime is 3.67×106 h , the activation energy E is 0.54eV, and the main failure mechanism is gate damage.
求助全文
通过发布文献求助,成功后即可免费获取论文全文。 去求助
来源期刊
自引率
0.00%
发文量
0
期刊最新文献
Study on PoP (package-on-package) Assembly Technology Using nanoprobing and SEM doping contrast techniques for failure analysis of current leakage in CMOS HV technology Reliability and failure mechanisms of lateral MOSFETs in synchronous DC-DC buck converter Impacts of electrical properties and reliability on Ge MOS capacitors with surface pretreatment Enhanced wafer analysis using a combination of test, emission and software net tracing
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
现在去查看 取消
×
提示
确定
0
微信
客服QQ
Book学术公众号 扫码关注我们
反馈
×
意见反馈
请填写您的意见或建议
请填写您的手机或邮箱
已复制链接
已复制链接
快去分享给好友吧!
我知道了
×
扫码分享
扫码分享
Book学术官方微信
Book学术官方微信
Book学术文献互助
Book学术文献互助群
群 号:604180095
Book学术
文献互助 智能选刊 最新文献 互助须知 联系我们:info@booksci.cn
Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。
Copyright © 2023 Book学术 All rights reserved.
ghs 京公网安备 11010802042870号 京ICP备2023020795号-1