M. Panicker, N. L. Greenman, J. Forster, P. Johnston
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Ball grid array (BGA) is emerging as the next significant surface-mount package. This paper describes a simply structured, cost-effective ceramic BGA substrate, which conforms to current JEDEC registrations for flip-chip connections, as an alternative to multilayer co-fired ceramic BGA's. The BGA, processed on VIA/PLANE, a ceramic wafer with hermetic, tungsten-copper vias, uses a thin-film deposition technique, Enhanced Ion Plating (EIP). Controlled-Collapse Chip Connection (C4), solder-bumped flip chips are typically full or partial arrays of 5 mil solder bumps on 10 mil centers. This BGA transforms the C4 density to 35 mil bumps on 50 mil centers, much more compatible with current surface-mount assembly practices. The use of VIA/PLANE maintains the time-proven reliability of C4 on ceramic, and the flatness characteristics of VIA/PLANE eminently complement C4 and BGA technologies.<>
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