{"title":"高温环境下金刚石MOSFET与常规MOSFET的实验比较研究","authors":"E. Galembeck, C. Renaux, D. Flandre, S. Gimenez","doi":"10.1109/S3S.2013.6716568","DOIUrl":null,"url":null,"abstract":"An experimental comparative study of the high temperature effects between the diamond SOI MOSFET (DSM) and conventional SOI MOSFET (CSM) counterparts is performed. The Diamond layout style has demonstrated better electrical performance in high temperatures environment, mainly for high-frequency analog IC applications, regarding the same gate area, aspect ratio and bias conditions. This can be justified due to the longitudinal corner effect (LCE) and PAMDLE (parallel association of MOSFETS with different channel lengths) effects remain active in the diamond layout style at high temperature.","PeriodicalId":219932,"journal":{"name":"2013 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S)","volume":"7 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2013-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"8","resultStr":"{\"title\":\"Experimental comparative study between the diamond MOSFET and its conventional counterpart in high temperatures environment\",\"authors\":\"E. Galembeck, C. Renaux, D. Flandre, S. Gimenez\",\"doi\":\"10.1109/S3S.2013.6716568\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"An experimental comparative study of the high temperature effects between the diamond SOI MOSFET (DSM) and conventional SOI MOSFET (CSM) counterparts is performed. The Diamond layout style has demonstrated better electrical performance in high temperatures environment, mainly for high-frequency analog IC applications, regarding the same gate area, aspect ratio and bias conditions. This can be justified due to the longitudinal corner effect (LCE) and PAMDLE (parallel association of MOSFETS with different channel lengths) effects remain active in the diamond layout style at high temperature.\",\"PeriodicalId\":219932,\"journal\":{\"name\":\"2013 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S)\",\"volume\":\"7 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2013-10-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"8\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2013 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/S3S.2013.6716568\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2013 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/S3S.2013.6716568","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Experimental comparative study between the diamond MOSFET and its conventional counterpart in high temperatures environment
An experimental comparative study of the high temperature effects between the diamond SOI MOSFET (DSM) and conventional SOI MOSFET (CSM) counterparts is performed. The Diamond layout style has demonstrated better electrical performance in high temperatures environment, mainly for high-frequency analog IC applications, regarding the same gate area, aspect ratio and bias conditions. This can be justified due to the longitudinal corner effect (LCE) and PAMDLE (parallel association of MOSFETS with different channel lengths) effects remain active in the diamond layout style at high temperature.
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