{"title":"在Xilinx Spartan FPGA上实现时间导数cnn","authors":"J. Albó-Canals, G. E. Pazienza","doi":"10.1109/CNNA.2012.6331418","DOIUrl":null,"url":null,"abstract":"Time-Derivative CNNs (TDCNNs) have been recently proposed as a novel paradigm realizing spatiotemporal transfer functions for linear filtering. Their dynamics is usually simulated with SIMULINK because VLSI chips are still in the preliminary phase. In order to make TDCNNs available to a larger audience, we present here their implementation on a Xilinx Spartan-6 FPGA. The results concerning an 8×8 network are promising and consistent with the SW simulations.","PeriodicalId":387536,"journal":{"name":"2012 13th International Workshop on Cellular Nanoscale Networks and their Applications","volume":"2 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2012-10-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Implementing Time-Derivative CNNs on a Xilinx Spartan FPGA\",\"authors\":\"J. Albó-Canals, G. E. Pazienza\",\"doi\":\"10.1109/CNNA.2012.6331418\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Time-Derivative CNNs (TDCNNs) have been recently proposed as a novel paradigm realizing spatiotemporal transfer functions for linear filtering. Their dynamics is usually simulated with SIMULINK because VLSI chips are still in the preliminary phase. In order to make TDCNNs available to a larger audience, we present here their implementation on a Xilinx Spartan-6 FPGA. The results concerning an 8×8 network are promising and consistent with the SW simulations.\",\"PeriodicalId\":387536,\"journal\":{\"name\":\"2012 13th International Workshop on Cellular Nanoscale Networks and their Applications\",\"volume\":\"2 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2012-10-18\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2012 13th International Workshop on Cellular Nanoscale Networks and their Applications\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/CNNA.2012.6331418\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2012 13th International Workshop on Cellular Nanoscale Networks and their Applications","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CNNA.2012.6331418","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Implementing Time-Derivative CNNs on a Xilinx Spartan FPGA
Time-Derivative CNNs (TDCNNs) have been recently proposed as a novel paradigm realizing spatiotemporal transfer functions for linear filtering. Their dynamics is usually simulated with SIMULINK because VLSI chips are still in the preliminary phase. In order to make TDCNNs available to a larger audience, we present here their implementation on a Xilinx Spartan-6 FPGA. The results concerning an 8×8 network are promising and consistent with the SW simulations.
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