{"title":"单层MoS2晶体管-弹道性能极限分析","authors":"K. Ganapathi, Y. Yoon, S. Salahuddin","doi":"10.1109/DRC.2011.5994421","DOIUrl":null,"url":null,"abstract":"To summarize, using ballistic NEGF-based transport simulations, we project the maximum performance achievable with monolayer MoS2 transistors. Our simulations show that these devices can provide (i) excellent switching behavior with very high ON current, (ii) a gm of about 3 mS/µm, and (iii) immunity to short channel effects thanks to the electrostatistically efficient 2-D geometry. We have also investigated the effect of underlap, barrier height and contact resistance on the device performance. We note that while these numbers are representative of the best performance MoS2 transistors can offer, the fact that they are significantly better than those for either state-of-the-art silicon, III–V or graphene makes MoS2 devices promising for future electronic applications.","PeriodicalId":107059,"journal":{"name":"69th Device Research Conference","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2011-06-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Monolayer MoS2 transistors - ballistic performance limit analysis\",\"authors\":\"K. Ganapathi, Y. Yoon, S. Salahuddin\",\"doi\":\"10.1109/DRC.2011.5994421\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"To summarize, using ballistic NEGF-based transport simulations, we project the maximum performance achievable with monolayer MoS2 transistors. Our simulations show that these devices can provide (i) excellent switching behavior with very high ON current, (ii) a gm of about 3 mS/µm, and (iii) immunity to short channel effects thanks to the electrostatistically efficient 2-D geometry. We have also investigated the effect of underlap, barrier height and contact resistance on the device performance. We note that while these numbers are representative of the best performance MoS2 transistors can offer, the fact that they are significantly better than those for either state-of-the-art silicon, III–V or graphene makes MoS2 devices promising for future electronic applications.\",\"PeriodicalId\":107059,\"journal\":{\"name\":\"69th Device Research Conference\",\"volume\":null,\"pages\":null},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2011-06-20\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"69th Device Research Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/DRC.2011.5994421\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"69th Device Research Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/DRC.2011.5994421","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
To summarize, using ballistic NEGF-based transport simulations, we project the maximum performance achievable with monolayer MoS2 transistors. Our simulations show that these devices can provide (i) excellent switching behavior with very high ON current, (ii) a gm of about 3 mS/µm, and (iii) immunity to short channel effects thanks to the electrostatistically efficient 2-D geometry. We have also investigated the effect of underlap, barrier height and contact resistance on the device performance. We note that while these numbers are representative of the best performance MoS2 transistors can offer, the fact that they are significantly better than those for either state-of-the-art silicon, III–V or graphene makes MoS2 devices promising for future electronic applications.