{"title":"考虑源极和漏极横向高斯掺杂分布的单材料双栅MOSFET栅极失调效应研究","authors":"Himanshu Diwakar, S. Nayak, Rohit Kumar","doi":"10.1109/EDKCON.2018.8770500","DOIUrl":null,"url":null,"abstract":"Un-intentional misalignment in the gate due to fabrication leads to undesirable device performances. In this paper, effect of gate misalignment has been presented in single-material double-gate (SMDG) MOSFET, based on simulation. The source and drain are considered to be doped with lateral Gaussian doping profile. A simulation study is performed to analyze the gate misalignment effects on the performance. A combination of total four misalignment is simulated, the effects on surface potential, device I-V characteristics and transconductance has been studied. We consider the misalignment at drain and source side of both front and back gate. When misalignment is there both trans-conductance and drain current decreases. Misalignment from drain and source side decreases trans-conductance similarly, but for 45% misalignment in the front gate, 34.8% degradation in the drain current is observed while similar misalignment in back gate causes 57.5% degradation. For simulations 2-D simulations by ATLAS™ from Silvaco Inc. is used and surface potential profile is obtained.","PeriodicalId":344143,"journal":{"name":"2018 IEEE Electron Devices Kolkata Conference (EDKCON)","volume":"86 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2018-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Study of Gate Misalignment Effects in Single-Material Double-Gate (SMDG) MOSFET Considering Source and Drain Lateral Gaussian Doping Profile\",\"authors\":\"Himanshu Diwakar, S. Nayak, Rohit Kumar\",\"doi\":\"10.1109/EDKCON.2018.8770500\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Un-intentional misalignment in the gate due to fabrication leads to undesirable device performances. In this paper, effect of gate misalignment has been presented in single-material double-gate (SMDG) MOSFET, based on simulation. The source and drain are considered to be doped with lateral Gaussian doping profile. A simulation study is performed to analyze the gate misalignment effects on the performance. A combination of total four misalignment is simulated, the effects on surface potential, device I-V characteristics and transconductance has been studied. We consider the misalignment at drain and source side of both front and back gate. When misalignment is there both trans-conductance and drain current decreases. Misalignment from drain and source side decreases trans-conductance similarly, but for 45% misalignment in the front gate, 34.8% degradation in the drain current is observed while similar misalignment in back gate causes 57.5% degradation. For simulations 2-D simulations by ATLAS™ from Silvaco Inc. is used and surface potential profile is obtained.\",\"PeriodicalId\":344143,\"journal\":{\"name\":\"2018 IEEE Electron Devices Kolkata Conference (EDKCON)\",\"volume\":\"86 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2018-11-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2018 IEEE Electron Devices Kolkata Conference (EDKCON)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/EDKCON.2018.8770500\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2018 IEEE Electron Devices Kolkata Conference (EDKCON)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EDKCON.2018.8770500","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Study of Gate Misalignment Effects in Single-Material Double-Gate (SMDG) MOSFET Considering Source and Drain Lateral Gaussian Doping Profile
Un-intentional misalignment in the gate due to fabrication leads to undesirable device performances. In this paper, effect of gate misalignment has been presented in single-material double-gate (SMDG) MOSFET, based on simulation. The source and drain are considered to be doped with lateral Gaussian doping profile. A simulation study is performed to analyze the gate misalignment effects on the performance. A combination of total four misalignment is simulated, the effects on surface potential, device I-V characteristics and transconductance has been studied. We consider the misalignment at drain and source side of both front and back gate. When misalignment is there both trans-conductance and drain current decreases. Misalignment from drain and source side decreases trans-conductance similarly, but for 45% misalignment in the front gate, 34.8% degradation in the drain current is observed while similar misalignment in back gate causes 57.5% degradation. For simulations 2-D simulations by ATLAS™ from Silvaco Inc. is used and surface potential profile is obtained.