用纳米压印和干法蚀刻制备双大马士革结构

N. Takeuchi, Genna Hasegawa, T. Komukai, T. Iwasaki, M. Hatano, M. Komori, T. Kono
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摘要

纳米压印光刻技术作为一种可替代的光刻技术,以低成本制造出精细的半导体器件图样而受到人们的关注。通过同时制造孔洞和沟槽,可以减少双大马士革结构的工艺步骤和制造成本。因此,在本研究中,我们研究了用零氮化镓和干法蚀刻制备双大马士革结构。然而,干式蚀刻工艺由于采用单一阻光刻膜同时蚀刻孔洞和沟槽,难度较大。抑制NIL过程中的缺陷和抑制蚀刻过程中的抗蚀剂消耗和CD移位是至关重要的。为了解决这些问题,我们使用了高蚀刻电阻的抗蚀剂,优化了NIL工艺以减少缺陷,优化了模板结构和蚀刻工艺以抑制抗蚀剂消耗和CD移位。得到了L/S = 4X/4X nm的双大马士革结构。
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Fabrication of dual damascene structure with nanoimprint lithography and dry-etching
Nanoimprint lithography (NIL) has received attention as alternative lithographic technology, which can fabricate fine patterns of semiconductor devices at low cost. Application of NIL may lead to the reduction of number of process steps and cost of manufacturing of dual-damascene structure, by simultaneous fabrication of holes and trenches. Therefore, in this study, we investigated fabrication of dual-damascene structure using NIL and dry-etching. However, the difficulty in dry-etching process is high as the holes and trenches are etched together using single resist mask. Suppression of defects during the NIL process and the suppression of resist consumption and CD shift during the etching process, is critical. To address these issues, we used a high etching resistance resist, optimized the NIL process to reduce defects, and optimized the template structure and etching process to suppress resist consumption and CD shift. As a result, a dual-damascene structure with L/S = 4X/4X nm was obtained.
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