Study of polysilsesquioxane dielectric for the use of multi-structured redistribution layers in fan-out wafer level packaging applications

Integrated circuit (IC) technologies have been significantly changed due to the strong demands of high performance, multifunction, low power, small size, and low cost. Furthermore, IC technology paradigms have been shifted to one-chip integration, 3D integration, and multi-function integration. However, since the scaling-down of IC devices has been reached to their physical limitations, several innovative packaging technologies such as 3D packaging, embedded packaging, and fan-out wafer level packaging (FOWLP) are actively studied for high I/O devices. In this study polysilsesquioxane (PSSQ) dielectric materials were investigated for the use of multi-structured redistribution layers in FOWLP applications. Organic-inorganic hybrid dielectric is expected to improve mechanical reliability and thermal stability. In addition, PSSQ has an excellent advantage of simultaneous curing and patterning through UV exposure. A PSSQ solution was spin-coated on 6-inch Si wafer followed by pre-baking and UV exposure. Then the pattern capability of PSSQ dielectric was evaluated by a scanning electron microscope, and the good pattern capability of $2 \mu \mathrm{m}$ lines was obtained. The dielectric constant of cured PSSQ was ranged from 2.0 to 2.4, and the dielectric loss was ranged from 0.0001 to 0.005. It has been demonstrated that PSSQ can be cured by UV exposure alone without a high temperature curing process.