一种在超再生接收机结构中解调QPSK信号的简单数字检测方案

G. H. Ibrahim, A. Hafez, A. Khalil
{"title":"一种在超再生接收机结构中解调QPSK信号的简单数字检测方案","authors":"G. H. Ibrahim, A. Hafez, A. Khalil","doi":"10.1109/IDT.2013.6727112","DOIUrl":null,"url":null,"abstract":"A digital detection scheme for demodulating QPSK signals is proposed. The proposed scheme can be a cascaded block following a super-regenerative oscillator that regenerates an input weak RF signal maintaining sent phase information. The detection scheme enables a simple and scalable implementation using digital logic gates and eliminates the need to downconversion step with accompanying PLL and mixers circuits. The resulting receiver would achieve lower power consumption figures than classical QPSK receivers based on direct downconversion.","PeriodicalId":446826,"journal":{"name":"2013 8th IEEE Design and Test Symposium","volume":"36 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2013-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"A simple digital detection scheme for demodulating QPSK signals in super-regenerative receiver architecture\",\"authors\":\"G. H. Ibrahim, A. Hafez, A. Khalil\",\"doi\":\"10.1109/IDT.2013.6727112\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A digital detection scheme for demodulating QPSK signals is proposed. The proposed scheme can be a cascaded block following a super-regenerative oscillator that regenerates an input weak RF signal maintaining sent phase information. The detection scheme enables a simple and scalable implementation using digital logic gates and eliminates the need to downconversion step with accompanying PLL and mixers circuits. The resulting receiver would achieve lower power consumption figures than classical QPSK receivers based on direct downconversion.\",\"PeriodicalId\":446826,\"journal\":{\"name\":\"2013 8th IEEE Design and Test Symposium\",\"volume\":\"36 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2013-12-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2013 8th IEEE Design and Test Symposium\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IDT.2013.6727112\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2013 8th IEEE Design and Test Symposium","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IDT.2013.6727112","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0

摘要

提出了一种用于QPSK信号解调的数字检测方案。所提出的方案可以是一个级联块,后面是一个超级再生振荡器,再生输入微弱的射频信号,保持发送的相位信息。该检测方案使用数字逻辑门实现简单且可扩展的实现,并消除了随附锁相环和混频器电路的下变频步骤的需要。由此产生的接收机将实现比基于直接下变频的经典QPSK接收机更低的功耗数字。
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A simple digital detection scheme for demodulating QPSK signals in super-regenerative receiver architecture
A digital detection scheme for demodulating QPSK signals is proposed. The proposed scheme can be a cascaded block following a super-regenerative oscillator that regenerates an input weak RF signal maintaining sent phase information. The detection scheme enables a simple and scalable implementation using digital logic gates and eliminates the need to downconversion step with accompanying PLL and mixers circuits. The resulting receiver would achieve lower power consumption figures than classical QPSK receivers based on direct downconversion.
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