{"title":"采用65nm逻辑CMOS技术实现的硅化多晶硅熔断器的表征","authors":"J. Im, Boon Ang, S. Tumakha, S. Paak","doi":"10.1109/NVMT.2006.378877","DOIUrl":null,"url":null,"abstract":"NiSi electrically programmable fuses (eFUSE) were fabricated and investigated using 65 nm logic CMOS technology. The optimization of fuse program was achieved by analyzing electrical and physical responses of fuse bits for various conditions. Controlled electromigration of Ni during fuse program was identified as a key factor in achieving reliably high post-program fuse resistance.","PeriodicalId":263387,"journal":{"name":"2006 7th Annual Non-Volatile Memory Technology Symposium","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2006-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"7","resultStr":"{\"title\":\"Characterization of Silicided Polysilicon Fuse Implemented in 65nm Logic CMOS Technology\",\"authors\":\"J. Im, Boon Ang, S. Tumakha, S. Paak\",\"doi\":\"10.1109/NVMT.2006.378877\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"NiSi electrically programmable fuses (eFUSE) were fabricated and investigated using 65 nm logic CMOS technology. The optimization of fuse program was achieved by analyzing electrical and physical responses of fuse bits for various conditions. Controlled electromigration of Ni during fuse program was identified as a key factor in achieving reliably high post-program fuse resistance.\",\"PeriodicalId\":263387,\"journal\":{\"name\":\"2006 7th Annual Non-Volatile Memory Technology Symposium\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2006-11-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"7\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2006 7th Annual Non-Volatile Memory Technology Symposium\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/NVMT.2006.378877\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2006 7th Annual Non-Volatile Memory Technology Symposium","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/NVMT.2006.378877","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Characterization of Silicided Polysilicon Fuse Implemented in 65nm Logic CMOS Technology
NiSi electrically programmable fuses (eFUSE) were fabricated and investigated using 65 nm logic CMOS technology. The optimization of fuse program was achieved by analyzing electrical and physical responses of fuse bits for various conditions. Controlled electromigration of Ni during fuse program was identified as a key factor in achieving reliably high post-program fuse resistance.