并行封装架构设计

L. Cao, J. Krusius
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引用次数: 10

摘要

封装是高密度电子系统性能和分区的主要制约因素之一。本文提出了一种用于设计此类系统物理结构的并行设计方法。包括建筑,电气,性能和能源管理方面。CAD工具AUDiT实现了这种设计方法。并发设计能力已通过高速数字设备3000/500 (Alpha)工程工作站的模型系统进行了说明。
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Concurrent packaging architecture design
Packaging is one of the primary constraints on the performance and partitioning of high density electronic systems. A concurrent design methodology for the design of the physical structure of such systems is presented here. Architecture, electrical, performance and energy management aspects are included. The CAD tool AUDiT implements this design methodology. The concurrent design capability has been illustrated using a model system derived from the high speed Digital Equipment 3000/500 (Alpha) engineering workstation.<>
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