功率限制下SOC的测试调度

2006 IEEE Design and Diagnostics of Electronic Circuits and systems Pub Date : 2006-04-18 DOI:10.1109/DDECS.2006.1649583

Jaroslav Skarvada

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引用次数: 8

摘要

本文研究了功率约束下的测试调度问题。提出了一种基于遗传算法的测试应用冲突图处理方法。该方法的主要目标是在考虑结构资源分配冲突的情况下最小化测试应用时间，并确保测试应用进度不超过芯片功率限制。本文给出了基于ITC’02 SOC基准测试套件的实验结果，并对未来的研究进行了展望

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Test Scheduling for SOC under Power Constraints

This paper deals with test scheduling under power constraints. An approach based on genetic algorithm operating on test application conflict graph is presented. The main goal of the method is to minimize test application time with considering structural resource allocation conflicts and to ensure that test application schedule does not exceed chip power limits. The proposed method was implemented using C++, experimental results with ITC'02 SOC benchmark suite are presented in the paper together with the perspectives for the future research

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2006 IEEE Design and Diagnostics of Electronic Circuits and systems

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