Jungwan Cho, Y. Won, D. Francis, M. Asheghi, K. Goodson
{"title":"gan -on-金刚石复合衬底的热界面电阻测量","authors":"Jungwan Cho, Y. Won, D. Francis, M. Asheghi, K. Goodson","doi":"10.1109/CSICS.2014.6978583","DOIUrl":null,"url":null,"abstract":"The performance of high-power gallium nitride (GaN) high-electron-mobility transistors (HEMTs) is limited by self-heating effects. High thermal resistances within micrometers of the active device junction often dominate the junction temperature rise and fundamentally limit the device power handling capability. The use of high-thermal-conductivity diamond in close proximity to the transistor junction can mitigate this thermal constraint, but careful attention is required to the quality of the thermal interface between the GaN and diamond. Here we apply time-domain thermoreflectance (TDTR) to two GaN-on-diamond composite substrates with varying GaN thicknesses to measure the thermal interface resistance between the GaN and diamond (29 m2 K GW-1) as well as the thermal conductivity of the GaN buffer layer (112 W m-1 K-1) at room temperature. Informed by these data, we perform finite-element analysis to quantify the relative impact of the GaN-diamond thermal interface resistance, diamond substrate thermal conductivity, and a convective cooling solution on the device channel temperature rise.","PeriodicalId":309722,"journal":{"name":"2014 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)","volume":"3 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2014-12-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"12","resultStr":"{\"title\":\"Thermal Interface Resistance Measurements for GaN-on-Diamond Composite Substrates\",\"authors\":\"Jungwan Cho, Y. Won, D. Francis, M. Asheghi, K. Goodson\",\"doi\":\"10.1109/CSICS.2014.6978583\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The performance of high-power gallium nitride (GaN) high-electron-mobility transistors (HEMTs) is limited by self-heating effects. High thermal resistances within micrometers of the active device junction often dominate the junction temperature rise and fundamentally limit the device power handling capability. The use of high-thermal-conductivity diamond in close proximity to the transistor junction can mitigate this thermal constraint, but careful attention is required to the quality of the thermal interface between the GaN and diamond. Here we apply time-domain thermoreflectance (TDTR) to two GaN-on-diamond composite substrates with varying GaN thicknesses to measure the thermal interface resistance between the GaN and diamond (29 m2 K GW-1) as well as the thermal conductivity of the GaN buffer layer (112 W m-1 K-1) at room temperature. Informed by these data, we perform finite-element analysis to quantify the relative impact of the GaN-diamond thermal interface resistance, diamond substrate thermal conductivity, and a convective cooling solution on the device channel temperature rise.\",\"PeriodicalId\":309722,\"journal\":{\"name\":\"2014 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)\",\"volume\":\"3 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2014-12-18\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"12\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2014 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/CSICS.2014.6978583\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2014 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CSICS.2014.6978583","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 12
摘要
大功率氮化镓(GaN)高电子迁移率晶体管(hemt)的性能受到自热效应的限制。有源器件结的高热阻往往在微米范围内主导结温升,从根本上限制了器件的功率处理能力。在晶体管结附近使用高导热金刚石可以减轻这种热约束,但需要仔细注意氮化镓和金刚石之间的热界面的质量。在这里,我们将时域热反射(TDTR)应用于具有不同GaN厚度的两种GaN-on-金刚石复合衬底,以测量GaN和金刚石之间的热界面电阻(29 m2 K GW-1)以及GaN缓冲层的导热系数(112 W m-1 K-1)。根据这些数据,我们进行了有限元分析,以量化gan -金刚石热界面电阻、金刚石衬底导热系数和对流冷却溶液对器件通道温升的相对影响。
Thermal Interface Resistance Measurements for GaN-on-Diamond Composite Substrates
The performance of high-power gallium nitride (GaN) high-electron-mobility transistors (HEMTs) is limited by self-heating effects. High thermal resistances within micrometers of the active device junction often dominate the junction temperature rise and fundamentally limit the device power handling capability. The use of high-thermal-conductivity diamond in close proximity to the transistor junction can mitigate this thermal constraint, but careful attention is required to the quality of the thermal interface between the GaN and diamond. Here we apply time-domain thermoreflectance (TDTR) to two GaN-on-diamond composite substrates with varying GaN thicknesses to measure the thermal interface resistance between the GaN and diamond (29 m2 K GW-1) as well as the thermal conductivity of the GaN buffer layer (112 W m-1 K-1) at room temperature. Informed by these data, we perform finite-element analysis to quantify the relative impact of the GaN-diamond thermal interface resistance, diamond substrate thermal conductivity, and a convective cooling solution on the device channel temperature rise.