S. Hsieh, K. Doong, Yens Ho, Sheng-che Lin, Binson Shen, Sing-Mo Tseng, Yeu-Haw Yang, Calvin Hsu
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Optimization of low-k dielectric (fluorinated SiO/sub 2/) process and evaluation of yield impact by using BEOL test structures
This work describes the optimization of low-k dielectric process and evaluation of yield impact by using back end of line (BEOL) test structures. Three splits of the low-k dielectric process were compared with high-density-plasma un-doped-silicon-glass (HDP-USG) process and are electrically characterized with the test structures of the BEOL unit process and integration process parameter extraction. The interconnect capacitance is used as the optimization criteria of low-k dielectric process and the yield impact is reviewed for the concern of manufacturing.
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