{"title":"一种混合铁电和电荷非易失性存储器","authors":"S. Rajwade, K. Auluck, J. Shaw, K. Lyon, E. Kan","doi":"10.1109/DRC.2011.5994474","DOIUrl":null,"url":null,"abstract":"We introduce a new nonvolatile memory that incorporates ferroelectric (FE) switching layer and charge-storage floating node in a single gate stack. This hybrid FE-charge design reduces the depolarization field in the FE layer as well as increases the memory window over conventional FE-FET. The magnitude of the electric field in the tunnel dielectric is reduced at retention and enhanced at program/erase from the FE polarization. This paper discusses the working principle, gate stack design, fabrication and experimental results of this hybrid design compared to FE-FET and charge-trap Flash.","PeriodicalId":107059,"journal":{"name":"69th Device Research Conference","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2011-06-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"A hybrid ferroelectric and charge nonvolatile memory\",\"authors\":\"S. Rajwade, K. Auluck, J. Shaw, K. Lyon, E. Kan\",\"doi\":\"10.1109/DRC.2011.5994474\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"We introduce a new nonvolatile memory that incorporates ferroelectric (FE) switching layer and charge-storage floating node in a single gate stack. This hybrid FE-charge design reduces the depolarization field in the FE layer as well as increases the memory window over conventional FE-FET. The magnitude of the electric field in the tunnel dielectric is reduced at retention and enhanced at program/erase from the FE polarization. This paper discusses the working principle, gate stack design, fabrication and experimental results of this hybrid design compared to FE-FET and charge-trap Flash.\",\"PeriodicalId\":107059,\"journal\":{\"name\":\"69th Device Research Conference\",\"volume\":null,\"pages\":null},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2011-06-20\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"69th Device Research Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/DRC.2011.5994474\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"69th Device Research Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/DRC.2011.5994474","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A hybrid ferroelectric and charge nonvolatile memory
We introduce a new nonvolatile memory that incorporates ferroelectric (FE) switching layer and charge-storage floating node in a single gate stack. This hybrid FE-charge design reduces the depolarization field in the FE layer as well as increases the memory window over conventional FE-FET. The magnitude of the electric field in the tunnel dielectric is reduced at retention and enhanced at program/erase from the FE polarization. This paper discusses the working principle, gate stack design, fabrication and experimental results of this hybrid design compared to FE-FET and charge-trap Flash.