先进的200毫米射频SOI技术,显示$78\ \text{fs}\ \ mathm {R}_ \text{ON}}\times \ mathm {C}_{\text{OFF}}$和3.7 V击穿电压,针对低于6 GHz的5G FEM

F. Gianesello, A. Fleury, F. Julien, J. Durá, S. Monfray, S. Dhar, C. Legrand, J. Amouroux, B. Gros, L. Welter, C. Charbuillet, P. Cathelin, E. Canderle, N. Vulliet, E. Escolier, L. Antunes, E. Granger, P. Fornara, C. Rivero, G. Bertrand, P. Chevalier, A. Régnier, D. Gloria
{"title":"先进的200毫米射频SOI技术,显示$78\\ \\text{fs}\\ \\ mathm {R}_ \\text{ON}}\\times \\ mathm {C}_{\\text{OFF}}$和3.7 V击穿电压,针对低于6 GHz的5G FEM","authors":"F. Gianesello, A. Fleury, F. Julien, J. Durá, S. Monfray, S. Dhar, C. Legrand, J. Amouroux, B. Gros, L. Welter, C. Charbuillet, P. Cathelin, E. Canderle, N. Vulliet, E. Escolier, L. Antunes, E. Granger, P. Fornara, C. Rivero, G. Bertrand, P. Chevalier, A. Régnier, D. Gloria","doi":"10.1109/RFIC54546.2022.9863082","DOIUrl":null,"url":null,"abstract":"RF Front End Modules (FEMs) are currently achieved using a variety of technologies. However, since integration drives wireless business in order to achieve the appropriate cost and form factor, CMOS Silicon-on-insulator (SOI) has been adopted 10 years ago and is now the dominant technology for RF switches in RF FEMs for cell phones and WiFi [1]. While current performances available on RF SOI technology have been exceeding what was feasible using GaAs one, new cellular system requirements ask even more stringent performances and consequently RF SOI technology must continue to improve. In this paper, we review and discuss the optimization of an advanced 200 mm RF SOI technology achieving $R_{\\text{ON}}\\times C_{\\text{OFF}}$ of 78 fs with a breakdown voltage of 3.7 V.","PeriodicalId":415294,"journal":{"name":"2022 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2022-06-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Advanced 200-mm RF SOI Technology exhibiting $78\\\\ \\\\text{fs}\\\\ \\\\mathrm{R}_{\\\\text{ON}}\\\\times \\\\mathrm{C}_{\\\\text{OFF}}$ and 3.7 V breakdown voltage targeting sub 6 GHz 5G FEM\",\"authors\":\"F. Gianesello, A. Fleury, F. Julien, J. Durá, S. Monfray, S. Dhar, C. Legrand, J. Amouroux, B. Gros, L. Welter, C. Charbuillet, P. Cathelin, E. Canderle, N. Vulliet, E. Escolier, L. Antunes, E. Granger, P. Fornara, C. Rivero, G. Bertrand, P. Chevalier, A. Régnier, D. Gloria\",\"doi\":\"10.1109/RFIC54546.2022.9863082\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"RF Front End Modules (FEMs) are currently achieved using a variety of technologies. However, since integration drives wireless business in order to achieve the appropriate cost and form factor, CMOS Silicon-on-insulator (SOI) has been adopted 10 years ago and is now the dominant technology for RF switches in RF FEMs for cell phones and WiFi [1]. While current performances available on RF SOI technology have been exceeding what was feasible using GaAs one, new cellular system requirements ask even more stringent performances and consequently RF SOI technology must continue to improve. In this paper, we review and discuss the optimization of an advanced 200 mm RF SOI technology achieving $R_{\\\\text{ON}}\\\\times C_{\\\\text{OFF}}$ of 78 fs with a breakdown voltage of 3.7 V.\",\"PeriodicalId\":415294,\"journal\":{\"name\":\"2022 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2022-06-19\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2022 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/RFIC54546.2022.9863082\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2022 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/RFIC54546.2022.9863082","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0

摘要

射频前端模块(fem)目前使用多种技术实现。然而,由于集成驱动无线业务以实现适当的成本和外形因素,CMOS绝缘体上硅(SOI)在10年前就被采用,现在是手机和WiFi射频fem中射频开关的主导技术[1]。虽然目前射频SOI技术的可用性能已经超过了使用GaAs技术的可行性,但新的蜂窝系统要求更严格的性能,因此射频SOI技术必须继续改进。在本文中,我们回顾和讨论了一种先进的200mm射频SOI技术的优化,该技术在3.7 V击穿电压下实现了78 fs的R_{\text{ON}}\次C_{\text{OFF}}$。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
查看原文
分享 分享
微信好友 朋友圈 QQ好友 复制链接
本刊更多论文
Advanced 200-mm RF SOI Technology exhibiting $78\ \text{fs}\ \mathrm{R}_{\text{ON}}\times \mathrm{C}_{\text{OFF}}$ and 3.7 V breakdown voltage targeting sub 6 GHz 5G FEM
RF Front End Modules (FEMs) are currently achieved using a variety of technologies. However, since integration drives wireless business in order to achieve the appropriate cost and form factor, CMOS Silicon-on-insulator (SOI) has been adopted 10 years ago and is now the dominant technology for RF switches in RF FEMs for cell phones and WiFi [1]. While current performances available on RF SOI technology have been exceeding what was feasible using GaAs one, new cellular system requirements ask even more stringent performances and consequently RF SOI technology must continue to improve. In this paper, we review and discuss the optimization of an advanced 200 mm RF SOI technology achieving $R_{\text{ON}}\times C_{\text{OFF}}$ of 78 fs with a breakdown voltage of 3.7 V.
求助全文
通过发布文献求助,成功后即可免费获取论文全文。 去求助
来源期刊
自引率
0.00%
发文量
0
期刊最新文献
A Compact Single Transformer Footprint Hybrid Current-Voltage Digital Doherty Power Amplifier A 4.2-9.2GHz Cryogenic Transformer Feedback Low Noise Amplifier with 4.5K Noise Temperature and Noise-Power Matching in 22nm CMOS FDSOI A 17 Gb/s 10.7 pJ/b 4FSK Transceiver System for Point to Point Communication in 65 nm CMOS A 60GHz Phased Array Transceiver Chipset in 45nm RF SOI Featuring Channel Aggregation Using HRM-Based Frequency Interleaving A 320μW Receiver with -58dB SIR Leveraging a Time-Varying N-Path Filter
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
现在去查看 取消
×
提示
确定
0
微信
客服QQ
Book学术公众号 扫码关注我们
反馈
×
意见反馈
请填写您的意见或建议
请填写您的手机或邮箱
已复制链接
已复制链接
快去分享给好友吧!
我知道了
×
扫码分享
扫码分享
Book学术官方微信
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术
文献互助 智能选刊 最新文献 互助须知 联系我们:info@booksci.cn
Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。
Copyright © 2023 Book学术 All rights reserved.
ghs 京公网安备 11010802042870号 京ICP备2023020795号-1