基于数据学习的跨时间框架状态对约束加速有界序列等价检验

Chia-Ling Chang, Charles H.-P. Wen, J. Bhadra
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引用次数: 7

摘要

为了加速求解有界序列等价检验(BSEC)问题,提出了一种学习滤波算法来揭示跨时间框架的状态对约束。首先,从少量的仿真数据中学习相应时间框架下触发器状态的松弛布尔函数,得出初始状态对候选集合。接下来,检查每个候选者,如果在模拟过程中这样一个候选者中的两个值都协调出现,则将其删除。然后,根据相应的增强电路检查剩余候选电路的有效性。最后,只有真正的约束被注释到BSEC问题,以方便SAT解决。所有基准电路在10种配置下合成,产生不同的BSEC问题。实验结果表明,与仅使用MiniSAT 2.0相比,新SAT求解速度平均快了2个数量级。此外,给定时间限制,在应用所提出的框架后,在4个较大的电路上,时间框架的总数可以增加8X-20X。
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Speeding up bounded sequential equivalence checking with cross-timeframe state-pair constraints from data learning
A learning-and-filtering algorithm is proposed to uncover cross-timeframe state-pair constraints for speeding up SAT solving of bounded sequential equivalence checking (BSEC) problems. First, relaxed Boolean functions for flip-flop states at respective timeframes are learned from a small number of simulation data to derive the initial set of the state-pair candidates. Next, each candidate is examined and removed if both values in such a candidate have coordinately appeared during the simulation. Then, the validity of the remaining candidates is checked against the corresponding augmented circuit. Last, only the true constraints are annotated to the BSEC problems to facilitate SAT solving. All benchmark circuits are synthesized under 10 configurations to produce different BSEC problems. Experimental results show that the new SAT solving runs 2-order faster in average compared to using MiniSAT 2.0 only. Moreover, given a time bound, the total number of timeframes can increase by 8X-20X on 4 larger circuits after applying the proposed framework.
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