{"title":"基于动态可重构电压-频率岛的多核soc系统能量优化","authors":"Song Jin, Songwei Pei, Yinhe Han, Huawei Li","doi":"10.1109/VLSI-DAT.2015.7114569","DOIUrl":null,"url":null,"abstract":"Voltage-frequency island (VFI)-based design has been widely exploited for optimizing system energy of embedded multi-core chip in recent years. The existing work either constructed a single static VFI partition for all kinds of applications or required per core voltage domain configuration. However, the former solution is difficult to find a single optimal VFI partition for diverse applications while the latter one suffers from high hardware cost. In this paper, we propose an energy optimization framework based on dynamically reconfigurable VFI (D-VFI). Our framework treats a small number of cores as dynamic cores (D-cores) and configures each of them with an independent voltage domain. At runtime, the D-cores can be pieced together with neighboring static VFIs. This can dynamically construct the optimal VFI partition for different kinds of applications, achieving more aggressive energy optimization under low cost. To identify the D-cores, we propose a D-VFI aware task scheduling and VFI partitioning algorithm. Moreover, we analyze all the VFI partitions to determine the optimal voltage scaling intervals which can accommodate performance degradation resulted from voltage scaling. Experimental results demonstrates that the effectiveness of the proposed scheme.","PeriodicalId":369130,"journal":{"name":"VLSI Design, Automation and Test(VLSI-DAT)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2015-04-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":"{\"title\":\"On optimizing system energy of multi-core SoCs based on dynamically reconfigurable voltage-frequency island\",\"authors\":\"Song Jin, Songwei Pei, Yinhe Han, Huawei Li\",\"doi\":\"10.1109/VLSI-DAT.2015.7114569\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Voltage-frequency island (VFI)-based design has been widely exploited for optimizing system energy of embedded multi-core chip in recent years. The existing work either constructed a single static VFI partition for all kinds of applications or required per core voltage domain configuration. However, the former solution is difficult to find a single optimal VFI partition for diverse applications while the latter one suffers from high hardware cost. In this paper, we propose an energy optimization framework based on dynamically reconfigurable VFI (D-VFI). Our framework treats a small number of cores as dynamic cores (D-cores) and configures each of them with an independent voltage domain. At runtime, the D-cores can be pieced together with neighboring static VFIs. This can dynamically construct the optimal VFI partition for different kinds of applications, achieving more aggressive energy optimization under low cost. To identify the D-cores, we propose a D-VFI aware task scheduling and VFI partitioning algorithm. Moreover, we analyze all the VFI partitions to determine the optimal voltage scaling intervals which can accommodate performance degradation resulted from voltage scaling. Experimental results demonstrates that the effectiveness of the proposed scheme.\",\"PeriodicalId\":369130,\"journal\":{\"name\":\"VLSI Design, Automation and Test(VLSI-DAT)\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2015-04-27\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"3\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"VLSI Design, Automation and Test(VLSI-DAT)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/VLSI-DAT.2015.7114569\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"VLSI Design, Automation and Test(VLSI-DAT)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSI-DAT.2015.7114569","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
On optimizing system energy of multi-core SoCs based on dynamically reconfigurable voltage-frequency island
Voltage-frequency island (VFI)-based design has been widely exploited for optimizing system energy of embedded multi-core chip in recent years. The existing work either constructed a single static VFI partition for all kinds of applications or required per core voltage domain configuration. However, the former solution is difficult to find a single optimal VFI partition for diverse applications while the latter one suffers from high hardware cost. In this paper, we propose an energy optimization framework based on dynamically reconfigurable VFI (D-VFI). Our framework treats a small number of cores as dynamic cores (D-cores) and configures each of them with an independent voltage domain. At runtime, the D-cores can be pieced together with neighboring static VFIs. This can dynamically construct the optimal VFI partition for different kinds of applications, achieving more aggressive energy optimization under low cost. To identify the D-cores, we propose a D-VFI aware task scheduling and VFI partitioning algorithm. Moreover, we analyze all the VFI partitions to determine the optimal voltage scaling intervals which can accommodate performance degradation resulted from voltage scaling. Experimental results demonstrates that the effectiveness of the proposed scheme.