Predicting time-to-failure using finite element analysis

Finite element analysis (FEA) was performed on three different surface mounted designs: a leadless chip carrier, gull-wing chip carrier, and compliant S-lead leadless chip carrier. The output of the FEA was input into the Coffin-Manson model, and the number of thermal cycles to failure was estimated. The results indicated that the gull-wing and S-leads chip carriers would be reliable when placed in this temperature environment but the leadless chip carriers would have reliability problems after a short period of time.<>