一种0.5V高速DRAM电荷转移感测放大器

2007 50th Midwest Symposium on Circuits and Systems Pub Date : 2007-08-01 DOI:10.1109/MWSCAS.2007.4488787

Hwang-Cherng Chow, Chaung-Lin Hsieh

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引用次数: 4

摘要

提出了一种适用于高速0.5 V dram的电荷转移感测放大方案。该传感放大器的交叉耦合结构和升压电容的结合使得传感节点之间的电压差最大，并且比现有技术电路的运行速度快40%。

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A 0.5V high speed DRAM charge transfer sense amplifier

A new charge transfer sense amplifier scheme is proposed for high speed 0.5 V DRAMs. The combination of both cross-coupled structure and boost capacitance of the proposed sense amplifier leads to the maximum voltage difference between sense nodes and 40% faster operation than prior art circuits.

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2007 50th Midwest Symposium on Circuits and Systems

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