{"title":"基于灵敏度分析的模拟电路故障检测测试频率压缩","authors":"A. Adha, M. Nourani","doi":"10.1109/DCAS.2018.8620115","DOIUrl":null,"url":null,"abstract":"In this paper, we present a methodology to test faults induced by large deviations in components in analog circuits through multi-frequency test based on sensitivity analysis. Final compaction of the test frequencies is done using a covering table optimization method. Test Frequency compaction and choice of observation points are based on a novel notation of fault equivalence and sensitivity curves. Our case study shows this method can effectively minimize the sinusoid test frequencies to separate the fault-free and faulty operations of the circuit under test for all faulty components.","PeriodicalId":320317,"journal":{"name":"2018 IEEE 13th Dallas Circuits and Systems Conference (DCAS)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2018-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Test Frequency Compaction for Fault Detection in Analog Circuits Using Sensitivity Analysis\",\"authors\":\"A. Adha, M. Nourani\",\"doi\":\"10.1109/DCAS.2018.8620115\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this paper, we present a methodology to test faults induced by large deviations in components in analog circuits through multi-frequency test based on sensitivity analysis. Final compaction of the test frequencies is done using a covering table optimization method. Test Frequency compaction and choice of observation points are based on a novel notation of fault equivalence and sensitivity curves. Our case study shows this method can effectively minimize the sinusoid test frequencies to separate the fault-free and faulty operations of the circuit under test for all faulty components.\",\"PeriodicalId\":320317,\"journal\":{\"name\":\"2018 IEEE 13th Dallas Circuits and Systems Conference (DCAS)\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2018-11-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2018 IEEE 13th Dallas Circuits and Systems Conference (DCAS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/DCAS.2018.8620115\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2018 IEEE 13th Dallas Circuits and Systems Conference (DCAS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/DCAS.2018.8620115","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Test Frequency Compaction for Fault Detection in Analog Circuits Using Sensitivity Analysis
In this paper, we present a methodology to test faults induced by large deviations in components in analog circuits through multi-frequency test based on sensitivity analysis. Final compaction of the test frequencies is done using a covering table optimization method. Test Frequency compaction and choice of observation points are based on a novel notation of fault equivalence and sensitivity curves. Our case study shows this method can effectively minimize the sinusoid test frequencies to separate the fault-free and faulty operations of the circuit under test for all faulty components.