Mark Lysinger, F. Jacquet, M. Zamanian, David McClure, P. Roche, Nihar Ranjan Sahoo, J. Russell
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A Radiation Hardened Nano-Power 8Mb SRAM in 130nm CMOS
An eight megabit rad hard SRAM, implemented in 130 nm CMOS technology, uses stacked capacitors within the memory cell for robustness, supply power gating and internally developed array power supplies to achieve very low soft error rates and standby current consumption under 600 nA.
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