一个无修剪的16b数字电位器

1984 IEEE International Solid-State Circuits Conference. Digest of Technical Papers Pub Date : 1900-01-01 DOI:10.1109/ISSCC.1984.1156642

P. Holloway

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引用次数: 23

摘要

在n阱CMOS双极工艺中实现的电压段DAC结构中，通过对未修整电阻串相邻抽头的级联第二级进行电位缓冲，实现了固有的16b单调性和温度。沉降到1/2 LSB的时间为3μs。

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A trimless 16b digital potentiometer

Inherent 16b monotonicity overtime and temperature has been achieved in a voltage-segment DAC structure implemented in an N-well CMOS bipolar process by potentiometrically buffering a cascaded second stage across adjacent taps of an untrimmed resistor string. Settling time to 1/2 LSB is 3μs.

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1984 IEEE International Solid-State Circuits Conference. Digest of Technical Papers

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