提高基于动态逻辑的管道的鲁棒性

H. Quintero, M. Avedillo, J. Núñez
{"title":"提高基于动态逻辑的管道的鲁棒性","authors":"H. Quintero, M. Avedillo, J. Núñez","doi":"10.1109/DCIS.2015.7388597","DOIUrl":null,"url":null,"abstract":"Domino dynamic circuits are widely used in critical parts of high performance systems. In this paper we show that, in addition to the functional limitation associated to the non-inverting behavior of Domino gates, there are also robustness disadvantages when compared to inverting dynamic gates. We analyze and compare the tolerance to parameter and operating conditions variations of gate-level pipelines implemented with Domino and with DOE, an inverting dynamic gate we have recently proposed. Our experiments confirm that DOE pipelines are more robust and that improvements are due to its non-inverting feature.","PeriodicalId":191482,"journal":{"name":"2015 Conference on Design of Circuits and Integrated Systems (DCIS)","volume":"33 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2015-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":"{\"title\":\"Improving robustness of dynamic logic based pipelines\",\"authors\":\"H. Quintero, M. Avedillo, J. Núñez\",\"doi\":\"10.1109/DCIS.2015.7388597\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Domino dynamic circuits are widely used in critical parts of high performance systems. In this paper we show that, in addition to the functional limitation associated to the non-inverting behavior of Domino gates, there are also robustness disadvantages when compared to inverting dynamic gates. We analyze and compare the tolerance to parameter and operating conditions variations of gate-level pipelines implemented with Domino and with DOE, an inverting dynamic gate we have recently proposed. Our experiments confirm that DOE pipelines are more robust and that improvements are due to its non-inverting feature.\",\"PeriodicalId\":191482,\"journal\":{\"name\":\"2015 Conference on Design of Circuits and Integrated Systems (DCIS)\",\"volume\":\"33 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2015-11-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"3\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2015 Conference on Design of Circuits and Integrated Systems (DCIS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/DCIS.2015.7388597\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2015 Conference on Design of Circuits and Integrated Systems (DCIS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/DCIS.2015.7388597","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 3

摘要

多米诺动态电路广泛应用于高性能系统的关键部件。在本文中,我们表明,除了与Domino门的非反相行为相关的功能限制外,与反相动态门相比,还存在鲁棒性缺点。我们分析并比较了Domino和DOE(我们最近提出的一种反向动态门)实现的门级管道对参数和运行条件变化的容忍度。我们的实验证实,DOE管道更健壮,并且由于其非逆变特性而得到了改进。
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Improving robustness of dynamic logic based pipelines
Domino dynamic circuits are widely used in critical parts of high performance systems. In this paper we show that, in addition to the functional limitation associated to the non-inverting behavior of Domino gates, there are also robustness disadvantages when compared to inverting dynamic gates. We analyze and compare the tolerance to parameter and operating conditions variations of gate-level pipelines implemented with Domino and with DOE, an inverting dynamic gate we have recently proposed. Our experiments confirm that DOE pipelines are more robust and that improvements are due to its non-inverting feature.
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