Lim Teck Guan, Eva Wai Leong Ching, Jong Ming Ching, Loh Woon Leng, D. Wee, S. Bhattacharya
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FOWLP and Si-Interposer for High-Speed Photonic Packaging
A FOWLP and a Si-Interposer integration platform for Electronic IC (EIC) and Photonic IC (PIC) are described here. These two platforms are capable to support high-speed integration and scalable design of the next generation Optical Engine. The integration of the PIC on the FOWLP is achieved by a simple novel solution. An additional section of the Si substrate is designed at the end of the PIC to protect the optical I/Os during the FOWLP embedding process. For the Through Si-Interposer, besides providing the EIC and PIC, it include the passive alignment feature for the fibre to the PIC assembly.
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