静电致软漏极损伤对CMOS产品寿命的影响

J. Reiner, T. Keller, H. Jaggi, S. Mira
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引用次数: 9

摘要

研究了静电致软漏结损伤对产品寿命的影响。对0.35 /spl mu/m CMOS IC的数千个输入输出(I/O)焊盘进行ESD(静电放电)应力,随后进行烘烤、ESD再应力和高温工作寿命测试。虽然在温度应力和ESD再应力下,ESD引起的软漏极损伤似乎是稳定的,但在加速工作寿命测试中,它会导致早期失效。这些寿命测试故障是由于在ESD应力期间栅极氧化物击穿而导致的,而在ESD应力期间栅极氧化物未被击穿,从而导致ESD诱导的软漏接损坏。因此,ESD引起的软漏接损坏可能会导致可靠性风险(潜在的ESD故障)。因此,需要通过确保IC对这种ESD损伤机制的足够鲁棒性来避免这种情况。用1 /spl mu/A的漏电流判据来检测这种ESD应力后的损伤是比较大的。
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Impact of ESD-induced soft drain junction damage on CMOS product lifetime
The impact of ESD-induced soft drain junction damage on product lifetime was investigated. Several thousand input-output (I/O) pads of a 0.35 /spl mu/m CMOS IC were stressed by ESD (electrostatic discharge) and subsequently subjected to bakes, ESD re-stress and high temperature operating life tests. While the ESD-induced soft drain junction damage appears to be stable versus temperature stress and ESD re-stress, it results in early failures during accelerated operating life tests. These life test failures are caused by breakdown of the gate oxide which was left unbroken during the ESD stress that caused the ESD-induced soft drain junction damage. Thus, ESD-induced soft drain junction damage might cause a reliability risk (latent ESD failure). Consequently, it needs to be avoided by assuring sufficient robustness of the IC against this ESD damage mechanism. A leakage current criterion of 1 /spl mu/A is rather large to detect this kind of damage after ESD stress.
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