{"title":"基于FPGA的重传计寄生信号分量数字滤波计算","authors":"D. Velychko, Y. I. Vdovychenko","doi":"10.1109/EWDTS.2011.6116591","DOIUrl":null,"url":null,"abstract":"This paper presents a calculation of a digital filter for the retransmission meter, rejecting parasitic signal spectrum components appeared during transformation in the retransmitter. FPGA programmed in VHDL is being used in the filter.","PeriodicalId":339676,"journal":{"name":"2011 9th East-West Design & Test Symposium (EWDTS)","volume":"39 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2011-09-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"A calculation of parasitic signal components digital filtration for the retransmission meter on the basis of FPGA\",\"authors\":\"D. Velychko, Y. I. Vdovychenko\",\"doi\":\"10.1109/EWDTS.2011.6116591\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents a calculation of a digital filter for the retransmission meter, rejecting parasitic signal spectrum components appeared during transformation in the retransmitter. FPGA programmed in VHDL is being used in the filter.\",\"PeriodicalId\":339676,\"journal\":{\"name\":\"2011 9th East-West Design & Test Symposium (EWDTS)\",\"volume\":\"39 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2011-09-09\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2011 9th East-West Design & Test Symposium (EWDTS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/EWDTS.2011.6116591\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2011 9th East-West Design & Test Symposium (EWDTS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EWDTS.2011.6116591","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A calculation of parasitic signal components digital filtration for the retransmission meter on the basis of FPGA
This paper presents a calculation of a digital filter for the retransmission meter, rejecting parasitic signal spectrum components appeared during transformation in the retransmitter. FPGA programmed in VHDL is being used in the filter.