时钟调制配电系统的优化设计

Electrical Performance of Electrical Packaging (IEEE Cat. No. 03TH8710) Pub Date : 2003-12-08 DOI:10.1109/EPEP.2003.1249997

R. Weekly, S. Chun, A. Haridass, C. O'Reilly, J. Jordan, F. O'Connell

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引用次数: 8

摘要

本文提出了一种微处理器(/spl mu/P)以频率函数形式呈现给配电系统(PDS)的电流激励提取方法。该方法使用时钟调制技术来测量uP所看到的阻抗。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Optimum design of power distribution system via clock modulation

This paper presents a method for extracting current excitations, which a microprocessor (/spl mu/P) can present to its power distribution system (PDS) as a function of frequency. The method uses a clock modulation technique to measure the impedance seen by the uP.

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Electrical Performance of Electrical Packaging (IEEE Cat. No. 03TH8710)

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