{"title":"惠普精密:频谱架构","authors":"R. B. Lee","doi":"10.1109/HICSS.1989.47164","DOIUrl":null,"url":null,"abstract":"The author discusses the Hewlett-Packard Precision architecture, which was designed as a common architecture for HP computer systems. It has a RISC (reduced-instruction-set computer)-like execution model, with features for code compaction and execution time reduction for frequent instruction sequences. In addition, it has features for making the architecture extendible, for enhancing its longevity, and for supporting different operating environments. The author describes some aspects of the Precision processor architecture, its goals, how it addresses the spectrum of general-purpose use information, processing needs, and some architectural design tradeoffs.<<ETX>>","PeriodicalId":300182,"journal":{"name":"[1989] Proceedings of the Twenty-Second Annual Hawaii International Conference on System Sciences. Volume 1: Architecture Track","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1989-01-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"HP Precision: a spectrum architecture\",\"authors\":\"R. B. Lee\",\"doi\":\"10.1109/HICSS.1989.47164\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The author discusses the Hewlett-Packard Precision architecture, which was designed as a common architecture for HP computer systems. It has a RISC (reduced-instruction-set computer)-like execution model, with features for code compaction and execution time reduction for frequent instruction sequences. In addition, it has features for making the architecture extendible, for enhancing its longevity, and for supporting different operating environments. The author describes some aspects of the Precision processor architecture, its goals, how it addresses the spectrum of general-purpose use information, processing needs, and some architectural design tradeoffs.<<ETX>>\",\"PeriodicalId\":300182,\"journal\":{\"name\":\"[1989] Proceedings of the Twenty-Second Annual Hawaii International Conference on System Sciences. Volume 1: Architecture Track\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1989-01-03\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"[1989] Proceedings of the Twenty-Second Annual Hawaii International Conference on System Sciences. Volume 1: Architecture Track\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/HICSS.1989.47164\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"[1989] Proceedings of the Twenty-Second Annual Hawaii International Conference on System Sciences. Volume 1: Architecture Track","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/HICSS.1989.47164","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
The author discusses the Hewlett-Packard Precision architecture, which was designed as a common architecture for HP computer systems. It has a RISC (reduced-instruction-set computer)-like execution model, with features for code compaction and execution time reduction for frequent instruction sequences. In addition, it has features for making the architecture extendible, for enhancing its longevity, and for supporting different operating environments. The author describes some aspects of the Precision processor architecture, its goals, how it addresses the spectrum of general-purpose use information, processing needs, and some architectural design tradeoffs.<>