{"title":"采用新型偏置反馈电路的14ghz频段谐波调谐低功耗低相位噪声压控集成电路","authors":"Mengchu Fang, T. Yoshimasu","doi":"10.1109/RFIC54546.2022.9863193","DOIUrl":null,"url":null,"abstract":"In this paper, a harmonic tuned low-power low-phase-noise VCO IC with a novel bias feedback circuit is proposed. The transformer-based LC tank providing high impedance at the second and third harmonics is used to improve the phase noise performance. In addition, a novel feedback circuit is designed to suppress the gate-to-source voltage of the core transistors under their threshold voltage at the steady state while guaranteeing the robust start-up of the oscillation. The novel feedback circuit that requires no dc power supply can operate with an extremely small additional dc power consumption. The proposed VCO IC is designed, fabricated, and fully evaluated on-wafer in 40-nm CMOS SOI process. The proposed VCO IC has exhibited a measured best phase noise of -131.8 dBc/Hz at 10-MHz offset from the oscillation frequency of 14.94 GHz under a dc power consumption of only 1.4 mW.","PeriodicalId":415294,"journal":{"name":"2022 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2022-06-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"A 14-GHz-Band Harmonic Tuned Low-Power Low-Phase-Noise VCO IC with a Novel Bias Feedback Circuit in 40-nm CMOS SOI\",\"authors\":\"Mengchu Fang, T. Yoshimasu\",\"doi\":\"10.1109/RFIC54546.2022.9863193\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this paper, a harmonic tuned low-power low-phase-noise VCO IC with a novel bias feedback circuit is proposed. The transformer-based LC tank providing high impedance at the second and third harmonics is used to improve the phase noise performance. In addition, a novel feedback circuit is designed to suppress the gate-to-source voltage of the core transistors under their threshold voltage at the steady state while guaranteeing the robust start-up of the oscillation. The novel feedback circuit that requires no dc power supply can operate with an extremely small additional dc power consumption. The proposed VCO IC is designed, fabricated, and fully evaluated on-wafer in 40-nm CMOS SOI process. The proposed VCO IC has exhibited a measured best phase noise of -131.8 dBc/Hz at 10-MHz offset from the oscillation frequency of 14.94 GHz under a dc power consumption of only 1.4 mW.\",\"PeriodicalId\":415294,\"journal\":{\"name\":\"2022 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2022-06-19\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2022 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/RFIC54546.2022.9863193\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2022 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/RFIC54546.2022.9863193","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A 14-GHz-Band Harmonic Tuned Low-Power Low-Phase-Noise VCO IC with a Novel Bias Feedback Circuit in 40-nm CMOS SOI
In this paper, a harmonic tuned low-power low-phase-noise VCO IC with a novel bias feedback circuit is proposed. The transformer-based LC tank providing high impedance at the second and third harmonics is used to improve the phase noise performance. In addition, a novel feedback circuit is designed to suppress the gate-to-source voltage of the core transistors under their threshold voltage at the steady state while guaranteeing the robust start-up of the oscillation. The novel feedback circuit that requires no dc power supply can operate with an extremely small additional dc power consumption. The proposed VCO IC is designed, fabricated, and fully evaluated on-wafer in 40-nm CMOS SOI process. The proposed VCO IC has exhibited a measured best phase noise of -131.8 dBc/Hz at 10-MHz offset from the oscillation frequency of 14.94 GHz under a dc power consumption of only 1.4 mW.