H. Hayashi, V. Axelrad, M. Mochizuki, T. Hayashi, T. Maruyama, Kazuya Suzuki, Y. Nagatomo
{"title":"利用TCAD优化二位闪存p通道单元结构的程序和擦除特性","authors":"H. Hayashi, V. Axelrad, M. Mochizuki, T. Hayashi, T. Maruyama, Kazuya Suzuki, Y. Nagatomo","doi":"10.1109/SISPAD.2014.6931590","DOIUrl":null,"url":null,"abstract":"This paper presents the optimization of the two bit flash memory P-channel cell structure using efficient 2D write and erase model. Our proposed cell structure stores charge at either Source and/or Drain sides of the gate in an SiN film and is based on method of programming by DAHE and erasing by FN tunneling. It is found that expansion of cell window and the improvement of erase characteristic depend on the optimization of the gate-film overlap under gate of the SiN film.","PeriodicalId":101858,"journal":{"name":"2014 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD)","volume":"33 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2014-10-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Optimization of program and erase characteristics of two bit flash memory P-channel cell structure using TCAD\",\"authors\":\"H. Hayashi, V. Axelrad, M. Mochizuki, T. Hayashi, T. Maruyama, Kazuya Suzuki, Y. Nagatomo\",\"doi\":\"10.1109/SISPAD.2014.6931590\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents the optimization of the two bit flash memory P-channel cell structure using efficient 2D write and erase model. Our proposed cell structure stores charge at either Source and/or Drain sides of the gate in an SiN film and is based on method of programming by DAHE and erasing by FN tunneling. It is found that expansion of cell window and the improvement of erase characteristic depend on the optimization of the gate-film overlap under gate of the SiN film.\",\"PeriodicalId\":101858,\"journal\":{\"name\":\"2014 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD)\",\"volume\":\"33 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2014-10-23\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2014 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/SISPAD.2014.6931590\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2014 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SISPAD.2014.6931590","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Optimization of program and erase characteristics of two bit flash memory P-channel cell structure using TCAD
This paper presents the optimization of the two bit flash memory P-channel cell structure using efficient 2D write and erase model. Our proposed cell structure stores charge at either Source and/or Drain sides of the gate in an SiN film and is based on method of programming by DAHE and erasing by FN tunneling. It is found that expansion of cell window and the improvement of erase characteristic depend on the optimization of the gate-film overlap under gate of the SiN film.