{"title":"网络和引脚分布的3D封装全局路由","authors":"J. Minz, M. Pathak, S. Lim","doi":"10.1109/DATE.2004.1269111","DOIUrl":null,"url":null,"abstract":"In this paper, we study the net and pin distribution problem for global routing targeting three dimensional packaging layout via system-on-package (SOP). The routing environment for the new emerging mixed-signal SOP technology is more advanced than that of the conventional PCB or MCM technology - pins are located at all layers of SOP packaging substrate rather than the top-most layer only. This is the first work to formulate and solve the multi-layer net and pin distribution for layer, wirelength, and crosstalk minimization.","PeriodicalId":335658,"journal":{"name":"Proceedings Design, Automation and Test in Europe Conference and Exhibition","volume":"2 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2004-02-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"8","resultStr":"{\"title\":\"Net and pin distribution for 3D package global routing\",\"authors\":\"J. Minz, M. Pathak, S. Lim\",\"doi\":\"10.1109/DATE.2004.1269111\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this paper, we study the net and pin distribution problem for global routing targeting three dimensional packaging layout via system-on-package (SOP). The routing environment for the new emerging mixed-signal SOP technology is more advanced than that of the conventional PCB or MCM technology - pins are located at all layers of SOP packaging substrate rather than the top-most layer only. This is the first work to formulate and solve the multi-layer net and pin distribution for layer, wirelength, and crosstalk minimization.\",\"PeriodicalId\":335658,\"journal\":{\"name\":\"Proceedings Design, Automation and Test in Europe Conference and Exhibition\",\"volume\":\"2 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2004-02-16\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"8\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings Design, Automation and Test in Europe Conference and Exhibition\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/DATE.2004.1269111\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings Design, Automation and Test in Europe Conference and Exhibition","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/DATE.2004.1269111","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Net and pin distribution for 3D package global routing
In this paper, we study the net and pin distribution problem for global routing targeting three dimensional packaging layout via system-on-package (SOP). The routing environment for the new emerging mixed-signal SOP technology is more advanced than that of the conventional PCB or MCM technology - pins are located at all layers of SOP packaging substrate rather than the top-most layer only. This is the first work to formulate and solve the multi-layer net and pin distribution for layer, wirelength, and crosstalk minimization.
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