三维集成电路的片上网络设计

2010 15th Asia and South Pacific Design Automation Conference (ASP-DAC) Pub Date : 2010-01-18 DOI:10.1109/ASPDAC.2010.5419902

S. Murali, L. Benini, G. Micheli

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引用次数: 6

摘要

三维集成电路，其中多个硅层垂直堆叠最近出现。3dic具有更小的外形尺寸，更短和更有效的电线使用，并允许在同一设备中集成多种技术。使用片上网络(noc)连接3D芯片中的组件是必要的。在这篇短文中，我们提出了设计3D集成电路专用noc的大纲。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Design of Networks on Chips for 3D ICs

Three-dimensional integrated circuits, where multiple silicon layers are stacked vertically have emerged recently. The3DICs have smaller form factor, shorter and efficient use of wires and allow integration of diverse technologies in the same device. The use of Networks on Chips (NoCs) to connect components in a 3D chip is a necessity. In this short paper, we present an outline on designing application-specific NoCs for 3D ICs.

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2010 15th Asia and South Pacific Design Automation Conference (ASP-DAC)

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