栅极全方位叠加纳米线场效应管的性能和设计考虑

2017 IEEE International Electron Devices Meeting (IEDM) Pub Date : 2017-12-02 DOI:10.1109/IEDM.2017.8268473

S. Barraud, V. Lapras, B. Previtali, M. Samson, J. Lacord, S. Martinie, M. Jaud, S. Athanasiou, F. Triozon, O. Rozeau, J. Hartmann, C. Vizioz, C. Comboroure, F. Andrieu, J. Barbe, M. Vinet, T. Ernst

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引用次数: 81

摘要

本文介绍了栅极全能(GAA)堆叠纳米线(NW) /纳米片(NS) mosfet的最新研究进展。将讨论关键的技术挑战，并介绍最新的研究成果。将分析Si NW/NS和FinFET中与宽度相关的载流子迁移率，并讨论GAA结构的内在性能和设计考虑因素，并将其与FinFET器件进行比较，重点关注静电、寄生电容和不同的布局选择。结果表明，为了实现功率性能的优化，堆叠型ns晶体管可以实现更大的灵活性。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Performance and design considerations for gate-all-around stacked-NanoWires FETs

This paper presents recent progress on Gate-All-Around (GAA) stacked-NanoWire (NW) / NanoSheet (NS) MOSFETs. Key technological challenges will be discussed and recent research results presented. Width-dependent carrier mobility in Si NW/NS and FinFET will be analyzed, and intrinsic performance and design considerations of GAA structures will be discussed and compared to FinFET devices with a focus on electrostatics, parasitic capacitances and different layout options. The results show that more flexibility can be achieved with stacked-NS transistors in order to manage power-performance optimization.

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2017 IEEE International Electron Devices Meeting (IEDM)

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