{"title":"聚酰亚胺多层绝缘子的可靠性影响","authors":"G. Brown","doi":"10.1109/IRPS.1981.363010","DOIUrl":null,"url":null,"abstract":"Polyimide films possess many characteristics that make them attractive candidates for application as multilevel insulators in the fabrication of VLSI devices. These include planarization of underlying topographies to improve metal step coverage, low interelectrode capacitance, low process temperatures compatible with all metal systems, and freedom from the corrosion liability associated with the phosphorus-doped oxide films commonly used for this purpose. The application of polyimide multilevel technology to MOS circuitry has been described by Sato, et al.1 for conventional aluminum gate devices, Shah, et al.2 for refractory gate structures, and Larsen3 for more complex silicon and aluminum MOS technology. Electrical parameters of polyimide films, including dc coniduction, dielectric constant and dissipation factor, and dielectric strength have been reported by Zielinski4 and Samuelson.5 At this symposium in 1976, Gregoritsch,6 and more recently Mukai, et al.7 have described reliability-oriented studies of structures containing polyimide films. While several of these workers have discussed effects of ionic contamination, dipoles, and electronic conduction at elevated temperatures, models relating these parameters to device reliability have not yet appeared.","PeriodicalId":376954,"journal":{"name":"19th International Reliability Physics Symposium","volume":"33 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1981-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"7","resultStr":"{\"title\":\"Reliability Implications of Polyimide Multilevel Insulators\",\"authors\":\"G. Brown\",\"doi\":\"10.1109/IRPS.1981.363010\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Polyimide films possess many characteristics that make them attractive candidates for application as multilevel insulators in the fabrication of VLSI devices. These include planarization of underlying topographies to improve metal step coverage, low interelectrode capacitance, low process temperatures compatible with all metal systems, and freedom from the corrosion liability associated with the phosphorus-doped oxide films commonly used for this purpose. The application of polyimide multilevel technology to MOS circuitry has been described by Sato, et al.1 for conventional aluminum gate devices, Shah, et al.2 for refractory gate structures, and Larsen3 for more complex silicon and aluminum MOS technology. Electrical parameters of polyimide films, including dc coniduction, dielectric constant and dissipation factor, and dielectric strength have been reported by Zielinski4 and Samuelson.5 At this symposium in 1976, Gregoritsch,6 and more recently Mukai, et al.7 have described reliability-oriented studies of structures containing polyimide films. While several of these workers have discussed effects of ionic contamination, dipoles, and electronic conduction at elevated temperatures, models relating these parameters to device reliability have not yet appeared.\",\"PeriodicalId\":376954,\"journal\":{\"name\":\"19th International Reliability Physics Symposium\",\"volume\":\"33 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1981-04-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"7\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"19th International Reliability Physics Symposium\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IRPS.1981.363010\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"19th International Reliability Physics Symposium","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IRPS.1981.363010","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Reliability Implications of Polyimide Multilevel Insulators
Polyimide films possess many characteristics that make them attractive candidates for application as multilevel insulators in the fabrication of VLSI devices. These include planarization of underlying topographies to improve metal step coverage, low interelectrode capacitance, low process temperatures compatible with all metal systems, and freedom from the corrosion liability associated with the phosphorus-doped oxide films commonly used for this purpose. The application of polyimide multilevel technology to MOS circuitry has been described by Sato, et al.1 for conventional aluminum gate devices, Shah, et al.2 for refractory gate structures, and Larsen3 for more complex silicon and aluminum MOS technology. Electrical parameters of polyimide films, including dc coniduction, dielectric constant and dissipation factor, and dielectric strength have been reported by Zielinski4 and Samuelson.5 At this symposium in 1976, Gregoritsch,6 and more recently Mukai, et al.7 have described reliability-oriented studies of structures containing polyimide films. While several of these workers have discussed effects of ionic contamination, dipoles, and electronic conduction at elevated temperatures, models relating these parameters to device reliability have not yet appeared.