用FPGA和DSP实现实时图像处理系统

M. V. Ganeswara Rao, P. Kumar, A. M. Prasad
{"title":"用FPGA和DSP实现实时图像处理系统","authors":"M. V. Ganeswara Rao, P. Kumar, A. M. Prasad","doi":"10.1109/MICROCOM.2016.7522496","DOIUrl":null,"url":null,"abstract":"The Real time image processing is always in high demand for many applications used in security system, remote sensing, manufacturing process and multimedia, those require to have high performance. Based on that requirement, image processing systems have been proposed in this paper using a heterogeneous platform called TMS320DM642. The platform has an FPGA chip and a DSP processor. The FPGA chip is used as a functional element for image sampling and display and the DSP processor is used for critical image processing. In this paper, firstly we discuss the proposed hardware architecture and its working principle and then some key issues related external memory interface. Finally, an image edge detection algorithm is presented to test functionality of the proposed system. The developed system can acquire live frames from camera, display images on VGA monitor or NTSC/PAL TV and execute some image processing functions like colour model conversion, pixel based operation etc. It is also proved that the developed system can meet the real time performance requirement.","PeriodicalId":118902,"journal":{"name":"2016 International Conference on Microelectronics, Computing and Communications (MicroCom)","volume":"115 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"22","resultStr":"{\"title\":\"Implementation of real time image processing system with FPGA and DSP\",\"authors\":\"M. V. Ganeswara Rao, P. Kumar, A. M. Prasad\",\"doi\":\"10.1109/MICROCOM.2016.7522496\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The Real time image processing is always in high demand for many applications used in security system, remote sensing, manufacturing process and multimedia, those require to have high performance. Based on that requirement, image processing systems have been proposed in this paper using a heterogeneous platform called TMS320DM642. The platform has an FPGA chip and a DSP processor. The FPGA chip is used as a functional element for image sampling and display and the DSP processor is used for critical image processing. In this paper, firstly we discuss the proposed hardware architecture and its working principle and then some key issues related external memory interface. Finally, an image edge detection algorithm is presented to test functionality of the proposed system. The developed system can acquire live frames from camera, display images on VGA monitor or NTSC/PAL TV and execute some image processing functions like colour model conversion, pixel based operation etc. It is also proved that the developed system can meet the real time performance requirement.\",\"PeriodicalId\":118902,\"journal\":{\"name\":\"2016 International Conference on Microelectronics, Computing and Communications (MicroCom)\",\"volume\":\"115 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1900-01-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"22\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2016 International Conference on Microelectronics, Computing and Communications (MicroCom)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/MICROCOM.2016.7522496\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 International Conference on Microelectronics, Computing and Communications (MicroCom)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/MICROCOM.2016.7522496","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 22

摘要

在安防系统、遥感、制造过程和多媒体等对实时图像处理性能要求较高的应用中,对实时图像处理有着很高的要求。基于这一需求,本文提出了基于异构平台TMS320DM642的图像处理系统。该平台采用FPGA芯片和DSP处理器。FPGA芯片作为图像采样和显示的功能元件,DSP处理器用于关键图像处理。本文首先讨论了所提出的硬件架构及其工作原理,然后讨论了与外部存储器接口相关的一些关键问题。最后,提出了一种图像边缘检测算法来测试系统的功能。所开发的系统可以采集摄像机的实时画面,在VGA显示器或NTSC/PAL电视上显示图像,并执行一些图像处理功能,如彩色模型转换、基于像素的运算等。实践证明,所开发的系统能够满足实时性要求。
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Implementation of real time image processing system with FPGA and DSP
The Real time image processing is always in high demand for many applications used in security system, remote sensing, manufacturing process and multimedia, those require to have high performance. Based on that requirement, image processing systems have been proposed in this paper using a heterogeneous platform called TMS320DM642. The platform has an FPGA chip and a DSP processor. The FPGA chip is used as a functional element for image sampling and display and the DSP processor is used for critical image processing. In this paper, firstly we discuss the proposed hardware architecture and its working principle and then some key issues related external memory interface. Finally, an image edge detection algorithm is presented to test functionality of the proposed system. The developed system can acquire live frames from camera, display images on VGA monitor or NTSC/PAL TV and execute some image processing functions like colour model conversion, pixel based operation etc. It is also proved that the developed system can meet the real time performance requirement.
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