位流计算转换器的容错保证

A. Gulin, N. Safyannikov, O. Bureneva, A. Y. Kaydanovich
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引用次数: 4

摘要

本文研究了一种具有高容错性的原始比特流器件的构造方法。这种特性是由于设备的原始结构,信息表示的容错形式以及具有高度技术可靠性的基本基础的使用而实现的。以比特流乘分器单元为例;给出了其RTL描述。给出了乘分器单元的仿真结果;给出了噪声影响后的结果恢复过程。
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Assurance of Fault-Tolerance in Bit-Stream Computing Converters
The article is devoted to the approach to the construction of original bit-stream devices, characterized by the high fault-tolerance. This property is achieved due to the original structure of the devices, fault-tolerant forms of information representation and the use of an elemental base with the high degree of technological reliability. A bit-stream multiplier-divider unit is considered as an example; its RTL description is presented. The results of the multiplier-divider unit simulation are shown; the process of the result recovery after the noise influence is presented.
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