{"title":"一个0.3µW,2.1µVrms的低噪声直流伺服回路神经记录斩波放大器","authors":"Yuchen Bao, Weijian Chen, Zhixian Li, Yongsen Chen, Yanhan Zeng","doi":"10.1109/ICTA56932.2022.9963006","DOIUrl":null,"url":null,"abstract":"This paper presents a low noise and low power circuit for neural recording. A Capacitively-Coupled Chopper Instrumentation Amplifier (CCIA) with embedded DC feedback is proposed to reduce the noise of system. Implemented a continuous-time low-pass filter (LPF) at the output of the system and utilized bulk-feedback techniques to increase its output swing. Furthermore, the DC-block and Chopper-Capacitor-Chopper Integrator Based DC Servo Loop (C3IB-DSL) are combined to reduce the interferences. According to experiment, the circuit consumes only 0.3 µW at 1.2 V. In addition, the input-referred noise reached 2.1 µVrms and the noise efficiency factor (NEF) 3.6 at the same time. The proposed CCIA was simulated in a 180n CMOS process.","PeriodicalId":325602,"journal":{"name":"2022 IEEE International Conference on Integrated Circuits, Technologies and Applications (ICTA)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2022-10-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"A 0.3-µW,2.1-µVrms Neural Recording Chopper Amplifier with Low Noise DC-Servo-Loop\",\"authors\":\"Yuchen Bao, Weijian Chen, Zhixian Li, Yongsen Chen, Yanhan Zeng\",\"doi\":\"10.1109/ICTA56932.2022.9963006\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents a low noise and low power circuit for neural recording. A Capacitively-Coupled Chopper Instrumentation Amplifier (CCIA) with embedded DC feedback is proposed to reduce the noise of system. Implemented a continuous-time low-pass filter (LPF) at the output of the system and utilized bulk-feedback techniques to increase its output swing. Furthermore, the DC-block and Chopper-Capacitor-Chopper Integrator Based DC Servo Loop (C3IB-DSL) are combined to reduce the interferences. According to experiment, the circuit consumes only 0.3 µW at 1.2 V. In addition, the input-referred noise reached 2.1 µVrms and the noise efficiency factor (NEF) 3.6 at the same time. The proposed CCIA was simulated in a 180n CMOS process.\",\"PeriodicalId\":325602,\"journal\":{\"name\":\"2022 IEEE International Conference on Integrated Circuits, Technologies and Applications (ICTA)\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2022-10-28\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2022 IEEE International Conference on Integrated Circuits, Technologies and Applications (ICTA)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICTA56932.2022.9963006\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2022 IEEE International Conference on Integrated Circuits, Technologies and Applications (ICTA)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICTA56932.2022.9963006","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A 0.3-µW,2.1-µVrms Neural Recording Chopper Amplifier with Low Noise DC-Servo-Loop
This paper presents a low noise and low power circuit for neural recording. A Capacitively-Coupled Chopper Instrumentation Amplifier (CCIA) with embedded DC feedback is proposed to reduce the noise of system. Implemented a continuous-time low-pass filter (LPF) at the output of the system and utilized bulk-feedback techniques to increase its output swing. Furthermore, the DC-block and Chopper-Capacitor-Chopper Integrator Based DC Servo Loop (C3IB-DSL) are combined to reduce the interferences. According to experiment, the circuit consumes only 0.3 µW at 1.2 V. In addition, the input-referred noise reached 2.1 µVrms and the noise efficiency factor (NEF) 3.6 at the same time. The proposed CCIA was simulated in a 180n CMOS process.