{"title":"CMOS微处理器的高密度C4/CBGA互连技术","authors":"G. Kromann, D. Gerke, W. Huang","doi":"10.1109/ECTC.1994.367657","DOIUrl":null,"url":null,"abstract":"The application of a controlled-collapse-chip-connection, ceramic-ball-grid-array (C4/CBGA) module for a RISC microprocessor is presented. The zero to second-level interconnection technologies and the various design considerations, from the on-chip redistribution metal to the single-chip module printed-circuit-board connection, are analysed. In addition to an overview of the interconnect technology, we discuss the: 1) electrical modeling and characterization, 2) board design and routability, 3) thermal management, and 4) C4 and ball-grid-array interconnection reliability.<<ETX>>","PeriodicalId":344532,"journal":{"name":"1994 Proceedings. 44th Electronic Components and Technology Conference","volume":"18 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1994-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"33","resultStr":"{\"title\":\"A hi-density C4/CBGA interconnect technology for a CMOS microprocessor\",\"authors\":\"G. Kromann, D. Gerke, W. Huang\",\"doi\":\"10.1109/ECTC.1994.367657\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The application of a controlled-collapse-chip-connection, ceramic-ball-grid-array (C4/CBGA) module for a RISC microprocessor is presented. The zero to second-level interconnection technologies and the various design considerations, from the on-chip redistribution metal to the single-chip module printed-circuit-board connection, are analysed. In addition to an overview of the interconnect technology, we discuss the: 1) electrical modeling and characterization, 2) board design and routability, 3) thermal management, and 4) C4 and ball-grid-array interconnection reliability.<<ETX>>\",\"PeriodicalId\":344532,\"journal\":{\"name\":\"1994 Proceedings. 44th Electronic Components and Technology Conference\",\"volume\":\"18 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1994-05-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"33\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"1994 Proceedings. 44th Electronic Components and Technology Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ECTC.1994.367657\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"1994 Proceedings. 44th Electronic Components and Technology Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ECTC.1994.367657","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A hi-density C4/CBGA interconnect technology for a CMOS microprocessor
The application of a controlled-collapse-chip-connection, ceramic-ball-grid-array (C4/CBGA) module for a RISC microprocessor is presented. The zero to second-level interconnection technologies and the various design considerations, from the on-chip redistribution metal to the single-chip module printed-circuit-board connection, are analysed. In addition to an overview of the interconnect technology, we discuss the: 1) electrical modeling and characterization, 2) board design and routability, 3) thermal management, and 4) C4 and ball-grid-array interconnection reliability.<>
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