High temperature and radiation hard CMOS SOI sub-threshold voltage reference

A CMOS voltage reference circuit robust under harsh environments such as high temperature and high radiation total dose is presented. To achieve ultra-low-power and harsh environment operation, the voltage reference circuit is designed in a suitable 130 nm Silicon-on-Insulator technology and is optimized to work in sub-threshold regime of the transistors. The design simulations have been performed over all temperature ranges and process corners and with custom model parameters, including shifts in mobilities and threshold voltages caused by radiation effects. The measurements demonstrate a maximum drift of the mean reference voltage (1.5 V) lower than 5% at 1.5 Mrad (Si) total dose radiation. The typical power dissipation up to 200 °C is less than 75 μW at 2.5 V supply voltage. The total occupied area including pad-ring is less than 0.09 mm2.